Abstract
In this chapter we analyze the \(\mathtt {LPR}\) ring-LWE public key encryption scheme of Sect. 2.4.1 and design a compact hardware architecture of the encryption processor. From Fig. 2.4 of Sect. 2.4.1, we see that the \(\mathtt {LPR}\) encryption scheme is composed of a discrete Gaussian sampler, a polynomial arithmetic (addition/multiplication) unit, a message encoder and a message decoder. In the last chapter we described how to design the discrete Gaussian sampler efficiently. In this chapter we first design a novel polynomial arithmetic unit and integrate it with the discrete Gaussian sampler to realize the ring-LWE public key encryption processor.
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Sinha Roy, S., Verbauwhede, I. (2020). Ring-LWE Public Key Encryption Processor. In: Lattice-Based Public-Key Cryptography in Hardware. Computer Architecture and Design Methodologies. Springer, Singapore. https://doi.org/10.1007/978-981-32-9994-8_5
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