Abstract
In recent years improvement in the design of SRAM cell increases drastically. The two major factors which have to be taken care are power dissipation and the noise margin of the SRAM cell. The power is subdivided into two groups that are switching power and standby power. The leakage current plays an important role in the power dissipation and has to be taken care. The noise margin also categorized as read margin and write margin. The purpose of this paper is to analyze and optimize the SRAM cell operation with respect to power and also measure the noise margin. The results show the low power operation of SRAM cell with relatively improved noise margin.
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Ojha, S.K., Singh, O.P., Mishra, G.R., Vaya, P.R. (2020). Analysis of SRAM Cell for Low Power Operation and Its Noise Margin. In: Dutta, D., Kar, H., Kumar, C., Bhadauria, V. (eds) Advances in VLSI, Communication, and Signal Processing. Lecture Notes in Electrical Engineering, vol 587. Springer, Singapore. https://doi.org/10.1007/978-981-32-9775-3_38
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DOI: https://doi.org/10.1007/978-981-32-9775-3_38
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