Skip to main content
Book cover

Proceedings of Second International Conference on Computational Electronics for Wireless Communications pp 465–478Cite as

Logic Gates Using Memristor-Aided Logic for Neuromorphic Applications

  • 137 Accesses

Part of the Lecture Notes in Networks and Systems book series (LNNS,volume 554)

Abstract

Data transfer rate has been a hornets’ nest for modern systems memory and CPU. One of the more appealing potentials to overcome the limits is to combine memory and processing at the same site where the data is stored. Memory processing has been exhibited using memristor-aided logic (MAGIC) operations in memristor. In this paper, Ag/AgInSbTe/Ta (AIST)-based memristor has been used to implement the memristor-based logic design. A memristor-only logic family referred to as MAGIC technique is used to perform logic gates such as AND, OR, NOT, and NAND. The logical operations were executed using Verilog-A model, and the figures of those operations are shown.

Keywords

  • Memristor
  • MAGIC
  • Crossbar
  • Ag/AgInSbTe/Ta-based memristor

This is a preview of subscription content, access via your institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • DOI: 10.1007/978-981-19-6661-3_42
  • Chapter length: 14 pages
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
eBook
USD   219.00
Price excludes VAT (USA)
  • ISBN: 978-981-19-6661-3
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
Softcover Book
USD   279.99
Price excludes VAT (USA)
Learn about institutional subscriptions
Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9

References

  1. Premsankar G, Di Francesco M, Taleb T (2018) Edge computing for the Internet of Things: a case study. IEEE Internet Things J 5(2):1275–1284

    CrossRef  Google Scholar 

  2. Radamson HH et al (2020) State of the art and future perspectives in advanced CMOS technology. Nanomater 1555

    Google Scholar 

  3. Jeong DS, Thomas R, Katiyar RS, Scott JF, Kohlstedt H, Petraru A, Hwang CS (2012) Emerging memories: resistive switching mechanisms and current status. Rep Prog Phys 75(7):076502

    CrossRef  Google Scholar 

  4. Kvatinsky S, Belousov D, Liman S, Satat G, Wald N, Friedman EG, Kolodny A, Weiser UC (2014) MAGIC—memristor-aided logic. In: IEEE 61(11):895–899

    Google Scholar 

  5. Kvatinsky S, Satat G, Wald N, Friedman EG, Kolodny A, Weiser UC (2014) Memristor-based material implication (IMPLY) logic: design principles and methodologies. In: IEEE 22(10)

    Google Scholar 

  6. Lehtonen E, Laiho M (2009) Stateful implication logic with memristors. In: IEEE

    Google Scholar 

  7. Meena JS, Sze SM, Chand U, Tseng T-Y (2014) Overview of emerging non-volatile memory technologies. Nanoscale Res Lett 9(1):526

    CrossRef  Google Scholar 

  8. Chua L (2011) Resistance switching memories are memristors. Appl Phys A 102(4):765–783

    CrossRef  MATH  Google Scholar 

  9. Chua L (1971) Memristor-the missing circuit element. IEEE Trans Circuit Theory 18(5):507–519

    CrossRef  Google Scholar 

  10. Snider GS (2008) Spike-timing-dependent learning in memristive nanodevices. In: 2008 IEEE International symposium on nanoscale architectures, pp 85–92

    Google Scholar 

  11. Williams R et al (2008) The missing memristor found. Nat 453(7191):80–83

    CrossRef  Google Scholar 

  12. Simmons JG (1963) Electric tunnel effect between dissimilar electrodes separated by a thin insulating film. J Appl Phys 34(9):2581–2590

    CrossRef  MATH  Google Scholar 

  13. Kvatinsky S, Friedman EG, Kolodny A, Weiser UC (2013) TEAM: threshold adaptive memristor model. IEEE Trans Circuits Systems I 60(1):211–221

    CrossRef  MATH  Google Scholar 

  14. Kvatinsky S, Ramadan M, Friedman EG, Kolodny A (2015) VTEAM: a general model for voltage-controlled memristors. IEEE Trans Circuits Syst II 62(8):786–790

    CrossRef  Google Scholar 

  15. Joglekar YN, Wolf SJ (2009) The elusive memristor: properties of basic electrical circuits. Eur J Phys 30(4):661

    CrossRef  MATH  Google Scholar 

  16. Biolek D, Biolkova V, Biolek Z (2009) SPICE model of memristor with nonlinear dopant drift. Radioeng

    Google Scholar 

  17. Zhang Y, Wang X, Li Y, Friedman EG (2017) Memristive model for synaptic circuits. IEEE Trans Circuits Syst II Express Briefs 64(7):767–771

    Google Scholar 

  18. Wang L, Zou H (2020) A new emotion model of associative memory neural network based on memristor. Neurocomput 410:83–92

    CrossRef  Google Scholar 

  19. Talati N, Gupta S, Mane P, Kvatinsky S (2016) Logic design within memristive memories using memristor-aided logic (MAGIC). IEEE Trans Nanotechnol 15(4):635–650

    CrossRef  Google Scholar 

  20. Thangkhiew PL, Gharpinde R, Chowdhary PV, Datta K, Sengupta I (2016) Area efficient implementation of ripple carry adder using memristor crossbar arrays. In: IEEE International design and test symposium (IDT), pp 142–147

    Google Scholar 

  21. Haque MN, Khan SR, Jooq MK, Al-Shidaifat A, Song H (2021) Analysis of analog neuron circuit using 180nm CMOS process for brain-inspired neural networks 399–401

    Google Scholar 

  22. Li Y et al (2015) Associative learning with temporal contiguity in a memristive circuit for large-scale neuromorphic networks. Adv Electron Mater 1(8):1500125

    CrossRef  Google Scholar 

  23. Hong Q, Li Y, Wang X (2020) Memristive continuous Hopfield neural network circuit for image restoration. Neural Comput Appl 32(12):8175–8185

    CrossRef  Google Scholar 

Download references

Acknowledgements

This research was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (NRF-2019R1F1A1056937). This research was also supported by the KOREA–INDIA joint program of cooperation in science and technology through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (NRF-2020K1A3A1A19086889). The chip fabrication and EDA tool were supported by the IC Design Education Center (IDEC), Korea.

Author information

Authors and Affiliations

  1. Department of Nanoscience and Engineering, Inje University, Gimhae, 50384, Korea

    Samiur Rahman Khan, Md. Nazmul Haque & Hanjung Song

  2. Department of Electronics and Communication Engineering, NITK, Surathkal, Mangaluru, India

    Md. Tarikul Islam, Jatoth Deepak Naik, AlaaDdin Al-Shidaifat & Sandeep Kumar

Authors
  1. Samiur Rahman Khan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Md. Nazmul Haque
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Md. Tarikul Islam
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Jatoth Deepak Naik
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. AlaaDdin Al-Shidaifat
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Hanjung Song
    View author publications

    You can also search for this author in PubMed Google Scholar

  7. Sandeep Kumar
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Samiur Rahman Khan .

Editor information

Editors and Affiliations

  1. Department of Electronics and Communication Engineering, Central University of Rajasthan, Ajmer, Rajasthan, India

    Sanyog Rawat

  2. Department of Electronics and Communication Engineering, National Institute of Technology Karnataka, Surathkal, India

    Sandeep Kumar

  3. Department of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal Academy of Higher Education, Manipal, India

    Pramod Kumar

  4. Department of Telecommunication Engineering, Universitat Ramon Llull, Barcelona, Spain

    Jaume Anguera

Rights and permissions

Reprints and Permissions

Copyright information

© 2023 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

About this paper

Verify currency and authenticity via CrossMark

Cite this paper

Khan, S.R. et al. (2023). Logic Gates Using Memristor-Aided Logic for Neuromorphic Applications. In: Rawat, S., Kumar, S., Kumar, P., Anguera, J. (eds) Proceedings of Second International Conference on Computational Electronics for Wireless Communications. Lecture Notes in Networks and Systems, vol 554. Springer, Singapore. https://doi.org/10.1007/978-981-19-6661-3_42

Download citation

  • DOI: https://doi.org/10.1007/978-981-19-6661-3_42

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-19-6660-6

  • Online ISBN: 978-981-19-6661-3

  • eBook Packages: EngineeringEngineering (R0)