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FPGA Implementation of Combined ECG Signal Denoising, Peak Detection Technique for Cardiac Pacemaker Systems

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High Performance and Power Efficient Electrocardiogram Detectors

Part of the book series: Energy Systems in Electrical Engineering ((ESIEE))

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Abstract

Cardiovascular diseases (CVD) are becoming significant for the ever-increasing mortality rates. Portable ECG devices are gaining importance and acceptance by medical practitioners as real-time human heart health monitoring devices. Holter devices cannot deliver real-time diagnosis requirements to identify arrhythmia, thus limiting their usage in critical conditions. Hence, there is a need to develop energy-efficient ECG detection algorithms for implantable and portable cardiac devices to monitor arrhythmia. A high-performance and energy-efficient electrocardiogram (ECG) detector to develop modern implantable cardiac pacemaker systems is presented in this chapter.

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Authors and Affiliations

  1. School of Electronics Engineering, Vellore Institute of Technology, Chennai, Tamil Nadu, India

    Ashish Kumar

  2. Department of Electronics and Communication, Delhi Technological University, Shahbad Daulatpur, Delhi, India

    Manjeet Kumar

  3. Department of Electronics and Communication, Bennett University, Greater Noida, Uttar Pradesh, India

    Rama S. Komaragiri

Authors
  1. Ashish Kumar
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  2. Manjeet Kumar
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  3. Rama S. Komaragiri
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Kumar, A., Kumar, M., Komaragiri, R.S. (2023). FPGA Implementation of Combined ECG Signal Denoising, Peak Detection Technique for Cardiac Pacemaker Systems. In: High Performance and Power Efficient Electrocardiogram Detectors. Energy Systems in Electrical Engineering. Springer, Singapore. https://doi.org/10.1007/978-981-19-5303-3_5

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  • DOI: https://doi.org/10.1007/978-981-19-5303-3_5

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-19-5302-6

  • Online ISBN: 978-981-19-5303-3

  • eBook Packages: EngineeringEngineering (R0)

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