Abstract
In the previous chapter we have discussed about the FSM design basics and various encoding methods. In this chapter let us design the sequence detectors to have minimum area, maximum speed, and minimum power.
The sequence detector design techniques are useful to design the FSM based controller and timing and control units.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2023 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.
About this chapter
Cite this chapter
Taraate, V. (2023). Design of Sequence Detectors. In: Digital Design from the VLSI Perspective. Springer, Singapore. https://doi.org/10.1007/978-981-19-4652-3_13
Download citation
DOI: https://doi.org/10.1007/978-981-19-4652-3_13
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-19-4651-6
Online ISBN: 978-981-19-4652-3
eBook Packages: EngineeringEngineering (R0)