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Hardware Security in Emerging Photonic Network-on-Chip Architectures

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Emerging Computing: From Devices to Systems

Part of the book series: Computer Architecture and Design Methodologies ((CADM))

Abstract

Photonic networks-on-chip (PNoCs) enable high bandwidth on-chip data transfers by using photonic waveguides capable of dense-wavelength-division-multiplexing (DWDM) for signal traversal and microring resonators (MRs) for signal modulation. A Hardware Trojan in a PNoC can manipulate the electrical driving circuit of its MRs to cause the MRs to snoop data from the neighboring wavelength channels in a shared photonic waveguide. This introduces a serious security threat. This chapter presents a novel framework called SOTERIA that utilizes process variation based authentication signatures along with architecture-level enhancements to protect data in PNoC architectures from snooping attacks. With a minimal overheads of up to 10.6% in average latency and of up to 13.3% in energy-delay-product (EDP) our approach can significantly enhance the hardware security in DWDM-based PNoCs.

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Acknowledgements

This research is supported by grants from the University of Kentucky and NSF (CCF-1813370).

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Authors and Affiliations

  1. Electrical and Computer Engineering Department, University of Kentucky, Lexington, KY, 40506, USA

    Ishan G. Thakkar

  2. Micron Technology, Inc., Austin, TX, USA

    Sai Vineel Reddy Chittamuru

  3. Qualcomm, San Diego, CA, USA

    Varun Bhat

  4. Electrical Engineering, University of Kentucky, Lexington, KY, 40506, USA

    Sairam Sri Vatsavai

  5. Electrical and Computer Engineering Department, Colorado State University, Fort Collins, CO, 80523, USA

    Sudeep Pasricha

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  1. Ishan G. Thakkar
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  2. Sai Vineel Reddy Chittamuru
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  3. Varun Bhat
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  4. Sairam Sri Vatsavai
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  5. Sudeep Pasricha
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Correspondence to Sudeep Pasricha .

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  1. School of Computer Science and Engineering, Nanyang Technological University, Singapore, Singapore

    Mohamed M. Sabry Aly

  2. School of Computer Science and Engineering, Nanyang Technological University, Singapore, Singapore

    Anupam Chattopadhyay

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Thakkar, I.G., Chittamuru, S.V.R., Bhat, V., Vatsavai, S.S., Pasricha, S. (2023). Hardware Security in Emerging Photonic Network-on-Chip Architectures. In: Aly, M.M.S., Chattopadhyay, A. (eds) Emerging Computing: From Devices to Systems. Computer Architecture and Design Methodologies. Springer, Singapore. https://doi.org/10.1007/978-981-16-7487-7_9

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