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Design of Multistage Counters Using Linear Feedback Shift Register

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Inventive Communication and Computational Technologies

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 311))

Abstract

Applications such as single-photon detection require the use of large array of counters within a small area. Linear feedback shift registers (LFSR) can be considered as the best option for such applications, where the area can be considerably reduced. Compared to a conventional binary counter, these counters enhance area and performance. In existing literature, only many-to-one LFSR structure was used. However, if LFSR counter is used for first stage and binary counters for subsequent stages could increase performance of the counter designs. In this paper, the LFSR counters are combined with binary counters and the performance in terms of area, speed and power are compared with existing multistage counters. Also instead of using a decoding logic for each stage as in existing literature, a single decoder with a multiplexer is used. This gives a reduced area. A two stage LFSR counter is implemented in Xilinx Vivado 2017.2, and the results are validated. Due to its efficacy, they can be used in deep learning and big data analysis.

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Correspondence to J. P. Anita .

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Nair, N.B., Anita, J.P. (2022). Design of Multistage Counters Using Linear Feedback Shift Register. In: Ranganathan, G., Fernando, X., Shi, F. (eds) Inventive Communication and Computational Technologies. Lecture Notes in Networks and Systems, vol 311. Springer, Singapore. https://doi.org/10.1007/978-981-16-5529-6_13

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  • DOI: https://doi.org/10.1007/978-981-16-5529-6_13

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-16-5528-9

  • Online ISBN: 978-981-16-5529-6

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