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Universal Shift Register Designed at Low Supply Voltages in 20 nm FinFET Using Multiplexer

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Intelligent Sustainable Systems

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 213))

Abstract

Shift registers are utilized in personal computer systems as an element of ability, including RAM and numerous types of registers. Besides, automatic framework tasks including splitting, duplicating, and so forth are used to convert the identical information into sequential data or vice versa. This article provides a comprehensive shift register that can play a consistent and consistent shift activity. When the device limit is reduced after direct guidance, the short channel acts as power loss, surface scattering, and sinking speed. The recently planned relocation register uses CMOS, which will consume more power. The proposed registry, which takes advantage of the main innovations of FinFET, has the power to eliminate or alleviate the difficulties mentioned above. Relative performance studies are completed more rapidly than other standard schemes, taking into account necessary performance measures such as power delay product (PDP) and element energy delay product (EDP) measurements.

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Author information

Authors and Affiliations

  1. Bayview Asset Management, LLC, Coral Gables, FL, USA

    Rajeev Ratna Vallabhuni

  2. Department of Electronics and Communication Engineering, Institute of Aeronautical Engineering, Hyderabad, 500043, India

    Jujavarapu Sravana & Vallabhuni Vijay

  3. Department of Electronics and Communication Engineering, MLR Institute of Technology, Hyderabad, 500043, India

    Chandra Shaker Pittala

  4. Department of Electronics and Communication Engineering, Vignan’s Nirula Institute of Technology and Science for Women, Guntur, AP, India

    Mikkili Divya & B. M. S. Rani

Authors
  1. Rajeev Ratna Vallabhuni
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  2. Jujavarapu Sravana
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  3. Chandra Shaker Pittala
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  4. Mikkili Divya
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  5. B. M. S. Rani
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  6. Vallabhuni Vijay
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Corresponding author

Correspondence to Vallabhuni Vijay .

Editor information

Editors and Affiliations

  1. Gnanmani College of Engineering and Technology, Namakkal, Tamil Nadu, India

    Jennifer S. Raj

  2. Department of Business Administration, The Gerald Schwartz, School of Business, St. Francis Xavier University, Nova Scotia, NS, Canada

    Ram Palanisamy

  3. Department of Computer Engineering and Informatics, University of Patras, Patra, Greece

    Isidoros Perikos

  4. Department of Computer Science, Kennesaw State University, Kennesaw, GA, USA

    Yong Shi

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Vallabhuni, R.R., Sravana, J., Pittala, C.S., Divya, M., Rani, B.M.S., Vijay, V. (2022). Universal Shift Register Designed at Low Supply Voltages in 20 nm FinFET Using Multiplexer. In: Raj, J.S., Palanisamy, R., Perikos, I., Shi, Y. (eds) Intelligent Sustainable Systems. Lecture Notes in Networks and Systems, vol 213. Springer, Singapore. https://doi.org/10.1007/978-981-16-2422-3_17

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