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PLL Less Control Algorithm for Power Quality Improvement in Distribution System Using D-STATCOM

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Innovations in Electrical and Electronic Engineering

Abstract

In this paper, the phase-locked loop less (PLL) control technique has been investigated using four legs VSC-based D-STATCOM for unity power factor (UPF) mode. It is implemented using the MATLAB/Simulink environment. Further without PLL, the performance of D-STATCOM is measured graphically. The proposed technique is suitable for reactive power compensation, source current harmonic elimination and load balancing with linear and nonlinear load. The observation of simulated results of D-STATCOM provides the effective solution for power quality enhancements at steady-state and dynamic load.

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Correspondence to Atma Ram .

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Appendix

Appendix

Three-phase AC supply 100 V (L-L), 50 Hz, source impedance Zs (R = 0.05 Ω, L = 0.2 mH.

(1) Three-phase nonlinear load, R = 13.66 Ω, L = 10 mH,

(2) Nonlinear load (A-N) R = 15 Ω, L = 100 mH.

DC link capacitance and voltage Cdc = 3000 µF and Vdc = 300 V, interfacing inductor = 2 mH.

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Ram, A., Sharma, P.R., Ahuja, R.K., Goel, N. (2021). PLL Less Control Algorithm for Power Quality Improvement in Distribution System Using D-STATCOM. In: Favorskaya, M.N., Mekhilef, S., Pandey, R.K., Singh, N. (eds) Innovations in Electrical and Electronic Engineering. Lecture Notes in Electrical Engineering, vol 661. Springer, Singapore. https://doi.org/10.1007/978-981-15-4692-1_9

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  • DOI: https://doi.org/10.1007/978-981-15-4692-1_9

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-15-4691-4

  • Online ISBN: 978-981-15-4692-1

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