Skip to main content

Two-Dimensional Potential-Based Model for Tunnel Field-Effect Transistor (TFET)

  • Conference paper
  • First Online:
Emerging Trends in Photonics, Signal Processing and Communication Engineering

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 649))

  • 491 Accesses

Abstract

In this paper, we propose a two-dimensional analytical model of silicon-on-insulator tunneling field-effect transistors (SOI TFETs) by applying the superposition principle. By solving 2D Poisson’s equation with the help of boundary conditions of channel region and gate oxide region, we calculated the surface potential and electric field for both lateral and vertical directions. Here, we have demonstrated the results obtained from an analytical expression which has been compared with TCAD 2D simulator for some parameters, like gate oxide thickness, by varying the channel length with different Vgs and Vds values.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Nagavarapu V, Jhaveri R, Woo JCS (2008) The tunnel source (PNPN) n-MOSFET: a novel high performance transistor. IEEE Trans Electron Device 55(4):1013–1019

    Article  ADS  Google Scholar 

  2. Choi WY, Park BG, Lee JD, Liu TJK (2007) Tunneling field-effect transistors (TFETs) with sub threshold swing (SS) less than 60 mV/dec. IEEE Electron Device Lett 28(8):743–745

    Article  ADS  Google Scholar 

  3. Zhang Q, Zhao W, Seabaugh A (2006) Low subthreshold-swing tunnel transistors. IEEE Electron Device Lett 27(4):297–300

    Article  ADS  Google Scholar 

  4. Vimala P, Balamurugan NB (2013) Modelling the centroid and charge density in double-gate MOSFETs including quantum effects. Int J Electron 100(9):1283–1295

    Article  Google Scholar 

  5. Vimala P, Balamurugan NB (2014) A new analytical model for nanoscale trigate SOI MOSFETs including quantum effects. IEEE J Electron Devices Soc 2(1):1–7

    Article  Google Scholar 

  6. Choi WY, Song JY, Lee JD, Park YJ, Park BG (2005) 100 nm n-/p-channel I-MOS using a novel self-aligned structure. IEEE Electron Device Lett 26(4):261–263

    Google Scholar 

  7. Kam H, Lee DT, Howe RT, King TJ (2005) A new nano-electromechanical field effect transistor (NEMFET) design for low-power electronics. In: IEEE international electron device meeting 2005 IEDM Technical Digest, pp 463–466

    Google Scholar 

  8. Abele N, Fritschi N, Boucart K, Casset F, Ancey P, Ionescu AM (2005) Suspended-gate MOSFET: bringing new MEMS functionality into solid-state MOS transistor. In: IEEE international electron device meeting 2005 IEDM Technical Digest, pp 1075–1077

    Google Scholar 

  9. Kumar S, Goel E, Singh K, Singh B, Singh PK, Baral K, Jit S (2017) 2-D Analytical modeling of the electrical characteristics of dual-material double-Gate TFETs With a SiO2/HfO2 stacked gate-oxide structure. IEEE Trans Electron Device Publ 64

    Google Scholar 

  10. Wang P-F, Hilsenbeck K, Nirschl T, Oswald M, Stepper C, Weiss M, Schmitt-Landsiedel D, Hansch W (2004) Complementary tunneling transistor for low power applications. Solid State Electron 48(12):2281–2286

    Article  ADS  Google Scholar 

  11. Choi WY, Song JY, Lee JD, Park YJ, Park BG (2005) 70-nm impact-ionization metal–oxide–semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs) In: IEEE international electron device meeting 2005 IEDM Technical Digest, pp 975–978

    Google Scholar 

  12. Lee MJ, Choi WY (2011) Analytical model of single-gate silicon on insulator (SOI) tunneling field effect transistors (TFETs). Solid State Electron 63(1):110–114

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Netravathi Kulkarni .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2020 Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Kulkarni, N., Vimala, P. (2020). Two-Dimensional Potential-Based Model for Tunnel Field-Effect Transistor (TFET). In: Kadambi, G., Kumar, P., Palade, V. (eds) Emerging Trends in Photonics, Signal Processing and Communication Engineering. Lecture Notes in Electrical Engineering, vol 649. Springer, Singapore. https://doi.org/10.1007/978-981-15-3477-5_9

Download citation

Publish with us

Policies and ethics