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Applications of Emerging Memory Technology pp 191–213Cite as

mMPU—A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck

Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR.,volume 63)

Abstract

Data transfer between processing and memory units in modern computing systems is their main performance and energy-efficiency bottleneck, commonly known as the von Neumann bottleneck. Prior research attempts to alleviate the problem by moving the computing units closer to the memory that has had limited success since data transfer is still required. In this chapter, we present mMPU memristive memory processing unit, which relies on a memristive memory to perform computation using the memory cells, and therefore directly tackles the von Neumann bottleneck. In mMPU, the operation is controlled by a modified controller and peripheral circuit without changing the structure of the memory cells and arrays. As the basic logic element, we present Memristor-Aided loGIC (MAGIC), a technique to compute logical functions using memristors within the memory array. We further show how to extend basic MAGIC primitives to execute any arbitrary Boolean function and demonstrate the microarchitecture of the memory. This process is required to enable data computing using MAGIC. Finally, we show how to build the computing system using mMPU, which performs computation using MAGIC to enable a real processing-in-memory machine.

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Author information

Authors and Affiliations

  1. Computer Science and Engineering Department, University Of Michigan, Ann Arbor, Michigan, 48105, USA

    Nishil Talati

  2. Electrical Engineering Department, Technion - Israel Institute of Technology, 3200003, Haifa, Israel

    Rotem Ben-Hur, Nimrod Wald & Shahar Kvatinsky

  3. Electrical Engineering and Computer Science Department, University of California, Berkeley, 94720, Berkeley, CA, USA

    Ameer Haj-Ali

  4. Lehrstuhl für Informatik 3, Department Informatik (INF), Friedrich-Alexander-University (FAU) Erlangen-Nürnberg, 91058, Erlangen, Bayem, Germany

    John Reuben

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  1. Nishil Talati
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  2. Rotem Ben-Hur
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Correspondence to Nishil Talati .

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  1. Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, Delhi, India

    Prof. Dr. Manan Suri

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Talati, N., Ben-Hur, R., Wald, N., Haj-Ali, A., Reuben, J., Kvatinsky, S. (2020). mMPU—A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck. In: Suri, M. (eds) Applications of Emerging Memory Technology. Springer Series in Advanced Microelectronics, vol 63. Springer, Singapore. https://doi.org/10.1007/978-981-13-8379-3_8

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  • DOI: https://doi.org/10.1007/978-981-13-8379-3_8

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