Abstract
TFET abbreviated for tunnel field effect transistor, is a p-i-n diode which functions as a transistor when operated in the reverse bias condition, output current of which depends upon quantum tunneling of the charge carriers across a barrier, also called band-to-band tunneling that occurs between the source and the channel which is responsible for the switching mechanism. TFETs suffer from lower ON-state currents, considerable amount of ambipolar conduction currents and poor RF performance. The purpose of this paper is to study the selected TFET models which list out the significant improvements to provide better switching capabilities. Section 1 gives an introduction to the device discussing band-to-band tunneling (BTBT) and subthreshold swing. Section 2 highlights the study of previous related work on various TFET models such as DG-TFET, DP-TFET, DMCG-TFET, HG-dielectric TFET, overlapping gate on drain TFET, PAC-TFET, DMCG-CPTFET, SP-TFET, and Multi-Fin TFET which provide improvements in ION/IOFF ratio, ambipolar current suppression, and improved RF performance of the device. The models discussed make TFET a better candidate in terms of switching performance and potential model to substitute MOSFETs in low-power and high-speed switching circuits.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
ITRS Reports—International Technology Roadmap for Semiconductors. http://www.itrs2.net/itrs-reports.html. Accessed 28 Mar 2018
Mamidala JK, Vishnoi R, Pandey P (2016) Tunnel field effect transistors (TFET): modeling and simulation. ISBN 978-1-119-24629-9
Bhuwalka K, Sedlmaier S, Ludsteck AK, Tolksdorf C, Schulze J, Eisele I (2004) Vertical tunnel field-effect transistor. IEEE Trans Electron Devices 51(2)
Bhuwalka K, Schulze J, Eisele I (2005) Scaling the vertical tunnel FET with tunnel bandgap modulation and gate workfunction engineering. IEEE Trans Electron Devices 52(5):909–917
Narang R, Saxena M, Gupta M, Gupta RS (2011) Modeling and simulation of multi layer gate dielectric double gate tunnel field-effect transistor (DG-TFET). In: 2011 IEEE students’ technology symposium (TechSym), Kharagpur, pp 281–285
Mookerjea S, Datta RKS, Narayanan V (2009) Effective capacitance and drive current for tunnel FET (TFET) CV/I estimation. IEEE Trans Electron Devices 56(9)
Upasana MG, Narang R, Saxena M (2015) Influence of dielectric pocket on electrical characteristics of tunnel field effect transistor: a study to optimize the device efficiency. In: 2015 IEEE International conference on electron devices and solid-state circuits (EDSSC), Singapore, pp 762–765
Mishra A, Narang R, Saxena M, Gupta M (2016) Impact of interfacial fixed charges on the electrical characteristics of pocket-doped double-gate tunnel FET. IEEE Trans Device Mater Reliab 16(2):117–122
Narang R, Saxena M, Gupta RS, Gupta M (2013) Impact of temperature variations on the device and circuit performance of tunnel FET: a simulation study. IEEE Trans Nanotechnol 12(6)
Abdi DB, Jagadesh Kumar M (2014) Controlling ambipolar current in tunneling FETs using overlapping gate-on-drain. IEEE J Electron Devices Soc 2(6):187–190
Narang R, Saxena M, Gupta M (2015) Polarity and ambipolarity controllable (PAC) tunnel field effect transistor. In: 2015 IEEE International conference on electron devices and solid-state circuits (EDSSC), Singapore, pp 333–336
Upasana MG, Narang R, Saxena M, Gupta M (2015) Modeling and TCAD assessment for gate material and gate dielectric engineered TFET architectures: circuit-level investigation for digital applications. IEEE Trans Electron Devices 62(10):3348–3356
Nigam K, Pandey S, Kondekar PN, Sharma D, Kumar Parte P (2017) A barrier controlled charge plasma-based TFET with gate engineering for ambipolar suppression and RF/linearity performance improvement. IEEE Trans Electron Dev 64(6):2751–2757
Raad BR, Sharma D, Kondekar P, Nigam K, Baronia S (2017) DC and analog/RF performance optimisation of source pocket dual work function TFET. Int J Electron 104(12):1992–2006
Yadav D, Verma A, Sharma D, Tirkey S, Raad B (2017) Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance. Superlattices Microstruct 111:123–133
Thoti N, Lakshmi B (2017) RF performance enhancement in multi-fin TFETs by scaling inter fin separation. Mater Sci Semicond Process 71:304–309
Sylvia SS (2013) The tunnel FET. http://somaiasylvia.com/wp-content/uploads/2014/06/bd-operation.png. Accessed 27 Mar 2018
Wikimedia Commons contributors (2016) File: TFET transfer characteristics.png. https://commons.wikimedia.org/w/index.php?title=File:TFET_transfer_characteristics.png&oldid=227012829. Accessed 28 Mar 2018
Boucart K, Ionescu AM (2007) Double-gate tunnel FET with high-κ gate dielectric. IEEE Trans Electron Devices 54(7)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Sharma, N., Garg, N., Kaur, G. (2019). Advancements and Challenges in Tunnel Field Effect Transistor. In: Nath, V., Mandal, J. (eds) Proceedings of the Third International Conference on Microelectronics, Computing and Communication Systems. Lecture Notes in Electrical Engineering, vol 556. Springer, Singapore. https://doi.org/10.1007/978-981-13-7091-5_33
Download citation
DOI: https://doi.org/10.1007/978-981-13-7091-5_33
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-13-7090-8
Online ISBN: 978-981-13-7091-5
eBook Packages: EngineeringEngineering (R0)