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Performance Analysis of EMTCMOS Technique-Based D Flip-Flop Design at Varied Supply Voltages and Distinct Submicron Technology

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Soft Computing and Signal Processing

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 900))

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Abstract

Lower power consumption is one of the aspects to be considered in catering to the technical thirst of the man. Scaling is the methodology adopted in recent times, and it has been the source of driving for all the technological improvements in the recent past. Various attempts were made in the past to optimize power consumption values in the sequential circuits such as flip-flops. The comprehensive analysis was done at different technologies that projected the pitfalls in the performance of the circuit with respect to technology scaling in terms of leakage current, average power consumption, and delay. This method of applying multi-threshold voltage at different technologies paved the way to analyze the performance of the basic design of MTCMOS as well as the application such as ripple counter. The work is comprehensive approach to the performance of these circuits with performance metrics showing the better response for EMTCMOS-based designs.

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Correspondence to Patikineti Sreenivasulu .

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Sreenivasulu, P. (2019). Performance Analysis of EMTCMOS Technique-Based D Flip-Flop Design at Varied Supply Voltages and Distinct Submicron Technology. In: Wang, J., Reddy, G., Prasad, V., Reddy, V. (eds) Soft Computing and Signal Processing . Advances in Intelligent Systems and Computing, vol 900. Springer, Singapore. https://doi.org/10.1007/978-981-13-3600-3_41

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