Advertisement

Optimization of InP HEMT Using Multilayered Cap and Asymmetric Gate Recess

Conference paper
  • 677 Downloads
Part of the Communications in Computer and Information Science book series (CCIS, volume 836)

Abstract

In this research article, we optimize the design metrics of InP (Indium Phosphate) HEMT (High Electron Mobility Transistor) using asymmetric gate recess and multi-layered cap. The device proposed in this paper possesses heavily doped Source/Drain (S/D) region, asymmetric gate recess, multi-layered cap region, InP layer between cap and buffer region. The proposed device incorporates the use of ‘T’ shaped gate and δ (delta) - doping technique. This paper analyzes the RF and DC performances of the device with an In0.52Al0.48As supply layer, In0.65Ga0.35As channel layer built on an InP substrate, with a delta doping of thickness 1 nm, cap layer with varying compositions of InGaAs and a heavily doped S/D region of In0.52Ga0.48As. Complete analysis of the device such as its output characteristics (Drain Current (ID) – Drain Source Voltage (VDS)), transfer characteristics (ID − Gate Source Voltage (VGS)), threshold voltage (from ID - VGS plot), transconductance and transition frequency (fT) are obtained at room temperature (300 K) and the obtained values of these parameters are better as compared to the conventional HEMT because of the abatement of parasitics like S/D resistances. All simulations are performed using Silvaco ATLAS.

Keywords

InP HEMT Threshold voltage Transconductance Multi-layered cap region T-shaped gate Asymmetric gate recess Delta doping Switching action Heavily doped S/D region Transition frequency (fT

References

  1. 1.
    Nguyen, L.D., Brown, A.S., Thompson, M.A., Jelloian, L.M., Larson, L.E., Matloubian, M.: 650-AA self-aligned-gate pseudomorphic Al/sub 0.48/In/sub 0.52/As/Ga/sub 0.2/In/sub 0.8/As high electron mobility transistors. IEEE Electron Device Lett. 13(3), 143–145 (1992)CrossRefGoogle Scholar
  2. 2.
    Robin, F., Meier, H., Homan, O.J., Bachtold, W.: A novel asymmetric gate recess process for InP HEMTs. In: Conference Proceedings 14th Indium Phosphide and Related Materials Conference (Cat. No. 02CH37307), pp. 221–224 (2002)Google Scholar
  3. 3.
    Takahashi, T., et al.: Enhancement of fmax to 910 GHz by adopting asymmetric gate recess and double-side-doped structure in 75-nm-gate InAlAs/InGaAs HEMTs. IEEE Trans. Electron Devices 64(1), 89–95 (2017)CrossRefGoogle Scholar
  4. 4.
    Cidronali, A., et al.: Ultralow DC power VCO based on InP-HEMT and heterojunction interband tunnel diode for wireless applications. IEEE Trans. Microw. Theory Tech. 50(12), 2938–2946 (2002)CrossRefGoogle Scholar
  5. 5.
    Rosenbaum, S.E., et al.: 155- and 213-GHz AlInAs/GaInAs/InP HEMT MMIC oscillators. IEEE Trans. Microw. Theory Tech. 43(4), 927–932 (1995)CrossRefGoogle Scholar
  6. 6.
    Endoh, A., Shinohara, K., Watanabe, I., Mimura, T., Matsui, T.: Low-voltage and high-speed operations of 30-nm-gate pseudomorphic In0.52Al0.48As/In0.7Ga0.3As HEMTs under cryogenic conditions. IEEE Electron Device Lett. 30(10), 1024–1026 (2009)CrossRefGoogle Scholar
  7. 7.
    Medjdoub, F., et al.: InP HEMT downscaling for power applications at W band. IEEE Trans. Electron Devices 52(10), 2136–2143 (2005)CrossRefGoogle Scholar
  8. 8.
    Roy, P., Jawanpuria, S., Vismita, S.P., Islam, A.: Characterization of AlGaN and GaN based HEMT with AlN interfacial spacer. In: 2015 Fifth International Conference on Communication Systems and Network Technologies, Gwalior, pp. 786–788 (2015)Google Scholar
  9. 9.
    Radisic, V., Leong, K.M.K.H., Mei, X., Sarkozy, S., Yoshida, W., Deal, W.R.: Power amplification at 0.65 THz using InP HEMTs. IEEE Trans. Microw. Theory Tech. 60(3), 724–729 (2012)CrossRefGoogle Scholar
  10. 10.
    Menozzi, R., Borgarino, M., Baeyens, Y., Van Hove, M., Fantini, F.: On the effects of hot electrons on the DC and RF characteristics of lattice-matched InAlAs/InGaAs/InP HEMTs. IEEE Microw. Guided Wave Lett. 7(1), 3–5 (1997)CrossRefGoogle Scholar
  11. 11.
    Miras, A., Legros, E.: Very high-frequency small-signal equivalent circuit for short gate-length InP HEMTs. IEEE Trans. Microw. Theory Tech. 45(7), 1018–1026 (1997)CrossRefGoogle Scholar
  12. 12.
    Smith, P.M., et al.: Advances in InP HEMT technology for high frequency applications. In: Conference Proceedings 2001 International Conference on Indium Phosphide and Related Materials 13th IPRM (Cat. No. 01CH37198), Nara, pp. 9–14 (2001)Google Scholar
  13. 13.
    Rodilla, H., Schleeh, J., Nilsson, P., Wadefalk, N., Mateos, J., Grahn, J.: Cryogenic performance of low-noise InP HEMTs: a Monte Carlo study. IEEE Trans. Electron Devices 60(5), 1625–1631 (2013).  https://doi.org/10.1109/TED.2013.2253469CrossRefGoogle Scholar
  14. 14.
    Prasad, S., Dwivedi, A.K., Islam, A.: Characterization of AlGaN/GaN and AlGaN/AlN/GaN HEMTs in terms of mobility and subthreshold slope. J. Comput. Electron. 15(1), 172–180 (2016)CrossRefGoogle Scholar
  15. 15.
    Kumar, S., Kumar, V., Islam, A.: Characterisation of field plated high electron mobility transistor. In: 2016 International Conference on Microelectronics, Computing and Communications (MicroCom), Durgapur, pp. 1–3 (2016)Google Scholar
  16. 16.
    Chitransh, A., Moonka, S., Priya, A., Prasad, S., Sengupta, A. Islam, A.: Analysis of breakdown voltage of a field plated high electron mobility transistor. In: 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, pp. 167–169 (2017).  https://doi.org/10.1109/devic.2017.8073929
  17. 17.
    Sengupta, A., Islam, A.: Performance comparison of AlGaN/GaN HFET with sapphire and 4H-SiC substrate. In: 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, pp. 190–195 (2017).  https://doi.org/10.1109/devic.2017.8073934
  18. 18.
    Chatterjee, S., Sengupta, A., Kundu, S., Islam, A.: Analysis of AlGaN/GaN high electron mobility transistor for high frequency application. In: 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, pp. 196–199 (2017).  https://doi.org/10.1109/devic.2017.8073935
  19. 19.
    Moonka, S., Priya, A., Chitransh, A., Prasad, S., Sengupta, A., Islam, A.: Analysis of Al0.22Ga0.78As/In0.18Ga0.82As/GaAs pseudomorphic HEMT device with higher conductivity. In: 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, pp. 360–363 (2017).  https://doi.org/10.1109/devic.2017.8073969
  20. 20.
    Priya, A., Moonka, S., Chitransh, A., Prasad, S., Sengupta, A., Islam, A.: Development of HEMT device with surface passivation for a low leakage current and steep subthreshold slope. In: 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, pp. 364–367 (2017).  https://doi.org/10.1109/devic.2017.8073970

Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  1. 1.Department of Electronics and Communication EngineeringBirla Institute of Technology, MesraRanchiIndia

Personalised recommendations