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FPGA Structure

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Principles and Structures of FPGAs

Abstract

Here, each component in FPGAs is introduced in detail. First, the logic block structures with LUTs are introduced. Unlike classic logic blocks using a couple of 4-input LUTs and flip-flops, recent FPGAs use adaptive LUTs with more number of inputs and dedicated carry logics. Cluster structure is also introduced. Then, routing structure, switch block, connection block, and I/O block which connect basic logic blocks are explained. Next, macromodules which have become critical components of FPGA are introduced. Computation centric DSP block, hard-core processor, and embedded memory can compensate the weak point of random logics with logic blocks. The configuration is inevitable step to use SRAM-style FPGAs. Various methods to lighten burden are introduced here. Finally, PLL and DLL to deliver clock signals in the FPGA are introduced. This chapter treats most of FPGA components with examples of recent real devices by Xilinx and Altera (Intel).

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Notes

  1. 1.

    This figure is plotted based on the data presented in [5].

  2. 2.

    In Altera FPGAs, adaptive LUTs are also called fracturable LUTs.

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Author information

Authors and Affiliations

  1. Kumamoto University, Kumamoto, Japan

    Motoki Amagasaki

  2. Nagasaki University, Nagasaki, Japan

    Yuichiro Shibata

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  1. Motoki Amagasaki
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  2. Yuichiro Shibata
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Correspondence to Motoki Amagasaki .

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Editors and Affiliations

  1. Keio University, Yokohama, Japan

    Hideharu Amano

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Amagasaki, M., Shibata, Y. (2018). FPGA Structure. In: Amano, H. (eds) Principles and Structures of FPGAs. Springer, Singapore. https://doi.org/10.1007/978-981-13-0824-6_3

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  • DOI: https://doi.org/10.1007/978-981-13-0824-6_3

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