Skip to main content

Signaling Protocol Specification for Signaling Approach-Based Virtual Output Queue Router Architecture

  • Conference paper
  • First Online:
Information and Communication Technology for Competitive Strategies

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 40))

  • 1081 Accesses

Abstract

Network communication protocol is a set of rules used by the network designer while designing a packet in computer network. It is a mechanism through which the network and users are connected together and designer can easily expand and manage the capability of network. In this paper, work is presented on a new communication protocol with signaling mechanisms. This protocol is used for a new Virtual Output Queue (VoQ) router architecture by considering 2D mesh topology to support Quality of Service (QoS) requirements between all hardware resources in Network-on-Chip (NoC). This system will be responsible for forwarding the instantaneous information between the neighbor’s routers. With this new protocol, each router will get the present status information of its neighbor’s router in advance. Major issues of routing like static routing and congestion in the routing path will try to avoid by using this protocol.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Patti, R.S.: Three-dimensional integrated circuits and the future of system-on-chip designs. Proc. IEEE 94(6), 1214–1224 (2006)

    Article  Google Scholar 

  2. Wang, L.T., Stroud, C.E., Touba, N.A.: System-on-Chip Test Architectures: Nanometer Design for Testability. Morgan Kaufmann (2010)

    Google Scholar 

  3. Miorandi, D., Sicari, S., De Pellegrini, F., Chlamtac, I.: Internet of things: vision, applications and research challenges. AdHoc Netw. 10(7), 1497–1516 (2012)

    Google Scholar 

  4. Nasri, S.: New approach of QoS metric modeling on network on chip. Int. J. Commun. Netw. Syst. Sci. 4, 351–355 (2011). https://doi.org/10.4236/ijcns.2011.45040. Published Online May 2011. http://www.SciRP.org/journal/ijcns

  5. Liu, Y., He, H.: Grid service selection using QoS model. In: Third International Conference on Semantics, Knowledge and Grid, pp. 576–577 (2007)

    Google Scholar 

  6. Luo, J., Jiang, L., He, C.: Finite analysis for energy and QoS tradeoff in contention-based wireless sensor networks. In: International Conference on Communication (ICC). IEEE Communications Society, pp. 1–6 (2007)

    Google Scholar 

  7. Kunavut, K., Sanguankotchakorn, T.: Multi-constrained path (MCP) QoS routing in OLSR based on multiple additive QoS metrics. In: InterSium on Communications and Information Technologies (ISCIT-IEEE), pp. 226–231 (2010)

    Google Scholar 

  8. Karim, F., Nguyen, A., Dey, S., Rao, R.: On-chip communication architecture for OC-768 network processors. In: DAC01 Proceedings of the 38th Annual Design Automation Conference, DAC 2001, pp. 678–683, 18–22 June 2001

    Google Scholar 

  9. Moraes, F., et al.: HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integr. VLSI J. 38(1), 69–93 (2004). www.Elsevier.Computer.com

  10. Swapna, S.: Efficient router design for network on chip (2013)

    Google Scholar 

  11. Dally, W.J., Seitz, C.L.: The torus routing chip. J. Distrib. Comput. 187–196 (1986)

    Google Scholar 

  12. Salminen, E., Kangas, T., Hama La Inen, T.D.: HIBI communication network for system-on-chip. J. VLSI Signal Process. 43, 185–205 (2006)

    Google Scholar 

  13. Adulescu, A.R., Dielissen, J., Pestana, S.G., Gangwal, O.P., Rijpkema, E., Wielage, P., Goossens, K.: An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1) (2005)

    Google Scholar 

  14. Salminen, E., Kangas, T., Lahtinen, V., Riihima ki, J., Kuusilinna, K., Timo D.: Benchmarking mesh and hierarchical bus networks in system-on-chip context. J. Syst. Archit. (Elsevier) 53, 477–488 (2007)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Jaya R. Surywanshi .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer Nature Singapore Pte Ltd.

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Surywanshi, J.R., Padole, D.V. (2019). Signaling Protocol Specification for Signaling Approach-Based Virtual Output Queue Router Architecture. In: Fong, S., Akashe, S., Mahalle, P. (eds) Information and Communication Technology for Competitive Strategies. Lecture Notes in Networks and Systems, vol 40. Springer, Singapore. https://doi.org/10.1007/978-981-13-0586-3_3

Download citation

  • DOI: https://doi.org/10.1007/978-981-13-0586-3_3

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-13-0585-6

  • Online ISBN: 978-981-13-0586-3

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics