Power Management of Modern Processors

  • Jawad Haj-Yahya
  • Avi Mendelson
  • Yosi Ben Asher
  • Anupam Chattopadhyay
Part of the Computer Architecture and Design Methodologies book series (CADM)


Recent technology advances have resulted in power being the major concern for digital design. In this chapter, we give introduction to power management at modern processors and present the parameters that affect the energy and power of digital circuits. The state of the art in power management methodology is examined and we present energy efficiency metrics, such as the energy delay. We examine how modern processors utilize features, such as clock gating, power gating and DVFS in order to reduce the overall energy consumption of the platform while maintaining high performance. Finally, we present state-of-the-art techniques that are used today in modern processors.


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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  • Jawad Haj-Yahya
    • 1
  • Avi Mendelson
    • 2
  • Yosi Ben Asher
    • 3
  • Anupam Chattopadhyay
    • 4
  1. 1.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore
  2. 2.Department of Computer Science DepartmentTechnion—Israel Institute of TechnologyHaifaIsrael
  3. 3.Department of Computer ScienceUniversity of HaifaHaifaIsrael
  4. 4.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore

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