Design of a Hypothetical Processor Using Re-configurable Logic in VHDL

  • Ravinder Nath Rajotiya
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 732)


The twentieth century was century for inventions, and the field of electronics and computer was at boom. The size of computer drastically reduced to portable size. Lot of automated EDA tools appeared that simplified the design and development efforts of the engineers. Evolution of the re-configurable logic devices, such as PLA, PAL, CPLD, and FPGA, helped the designers to burn the design in programmable chips and get the functionality of the hardware, and allowed to test and verify before the product could be custom designed and mass fabricated. This paper attempts to design an 8-bit processing element that accepts 8-bit data and produce the desired result. The implementation has been done using the Xilinx ISE Web Pack, and simulations are carried out using ISE simulator.


Re-configurable FPGA Processor Register file ALU VHDL Shift and rotate Simulation 


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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  1. 1.Department of ECEJIMSEMTCGreater NoidaIndia

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