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Analysis of N+N Epi-Source Asymmetric Double Gate FD-SOI MOSFET

  • Narendra Yadava
  • Vimal K. Mishra
  • R. K. Chauhan
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 695)

Abstract

The conventional scaling of device dimension uses high doping which leads to degraded mobility and large undesirable junction capacitances. This paper provides a new idea to overcome the short-channel effects (SCEs) in the MOSFETs whose gate length lies in the deep submicrometer range. Here asymmetric DG-FD-SOI MOSFET having N+N epi-source is proposed whose performance is analyzed. The ION/IOFF ratio of the proposed device is nearly 1010 which is good enough for fast switching applications.

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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  • Narendra Yadava
    • 1
  • Vimal K. Mishra
    • 1
  • R. K. Chauhan
    • 1
  1. 1.Department of Electronics and Communication Engineering MMMUTGorakhpurIndia

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