Abstract
A 10 MHz, 84 μW PVT compensated ring oscillator is presented in 0.11 μm BCD9S (Bipolar CMOS DMOS) technology. The proposed ring oscillator is inherently temperature compensated and produces a frequency deviation of ±0.7% in typical corner, ±2.25% in slow corner and ±0.75% in fast corner around 10 MHz across −40 °C to 150 °C at a regulated supply of 1.8 V. The proposed oscillator exhibits less sensitivity to PVT variations and requires less area when compared to the state-of-the-art oscillators.
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References
Sundaresan, K., Allen, P., Ayazi, F.: Process and temperature compensation in a 7-MHz CMOS clock oscillator. IEEE J. Solid-State Circuits 41(2), 433–442 (2006)
Sadeghi, N., Bakhtiar, A.S., Mirabbasi, S.: A 0.007 mm2 108-ppm/1-MHz relaxation oscillator for high-temperature applications up to 180 in 0.13 μm CMOS. IEEE Trans. Circuits Syst. I, Reg. Papers 60(7), 16921701 (2013)
Sebastiano, F., Nauta, B., et al.: A 65-nm CMOS temperature compensated mobility-based frequency reference for wireless sensor networks. In: Proceedings of ESSCIRCs, pp. 102–105, September 2010
Ueno, K., Asai, T., Amemiya, Y.: A 30 MHz, 90-ppm/\( ^{ \circ } {\text{C}} \) fully integrated clock reference generator with frequency-locked loop. In: IEEE 35th ESSCIRC, Athens, Greece, pp. 392–395, September 2009
Lahiri, A., Tiwari, A.: A 140 µA 34 ppm/°C 30 MHz clock oscillator in 28 nm CMOS bulk process. In: IEEE 26th International Conference on VLSI Design (VLSID), Pune, India, pp. 173–178, January 2013
Baliga, B.J.: An overview of smart power technology. IEEE Trans. Electron Devices 38(7), 1568–1575 (1991)
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Tyagi, V., Hashmi, M.S., Raj, G., Rana, V. (2017). A 10 MHz, 73 ppm/°C, 84 µW PVT Compensated Ring Oscillator. In: Kaushik, B., Dasgupta, S., Singh, V. (eds) VLSI Design and Test. VDAT 2017. Communications in Computer and Information Science, vol 711. Springer, Singapore. https://doi.org/10.1007/978-981-10-7470-7_16
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DOI: https://doi.org/10.1007/978-981-10-7470-7_16
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