Abstract
The objective of the project is to design a CMOS circuit for a portable network. This CMOS circuit combines with instrumentation amplifier, switched capacitor, and proposed analog-to-digital converter. When the voltage is scaled to 1.8 V, the power consumption is reduced. The chopping method is introduced, and the 5 kHz is set for frequency; the frequency 1/f in the input transistor is less than the set frequency, and the electrode offset is suppressed by a dc servo loop. A low-pass SC filter is introduced to reduce the catches from the output of instrumentation amplifier. A successive approximation analog-to-digital converter is used to digitalize the signal. This CMOS circuit has been implemented in an 180 nm CMOS process.
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Dinesh Kumar, K., Ferents Koni Jiavana, K. (2018). Front-End CMOS Circuit for Low Power Consumption. In: Li, J., Sankar, A., Beulet, P. (eds) VLSI Design: Circuits, Systems and Applications . Lecture Notes in Electrical Engineering, vol 469. Springer, Singapore. https://doi.org/10.1007/978-981-10-7251-2_1
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DOI: https://doi.org/10.1007/978-981-10-7251-2_1
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