Abstract
Most of the recent studies on flash-aware index design focused mainly on the single channel flash memory where parallel processing of the B-tree index is not a consideration. This paper discusses efficient indexing on multi-channel flash storage and proposes a B-tree storage scheme, which not only exploits internal parallelisms of the underlying storage structure and also adjusts the node storage dynamically based on the run-time workload. Experimental results show that the proposed B-tree index layer is capable of speed up index operations near linearly while increasing degrees of internal parallelisms of flash memory.
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Acknowledgments
This research was supported by the MISP(Ministry of Science, ICT & Future Planning), Korea, under the National Program for Excellence in SW) supervised by the IITP(Institute for Information & communications Technology Promotion)
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Jin, R. (2018). B-Tree Index Layer for Multi-channel Flash Memory. In: Kim, K., Joukov, N. (eds) Mobile and Wireless Technologies 2017. ICMWT 2017. Lecture Notes in Electrical Engineering, vol 425. Springer, Singapore. https://doi.org/10.1007/978-981-10-5281-1_21
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DOI: https://doi.org/10.1007/978-981-10-5281-1_21
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Publisher Name: Springer, Singapore
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Online ISBN: 978-981-10-5281-1
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