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Common-Mode Voltage Regulation of Three-Phase SVPWM-Based three-Level NPC Inverter

  • Subramaniam UmashankarEmail author
  • Vishnu Kalaiselvan Arun Shankar
  • Padmanaban Sanjeevikumar
  • K. Harini
Chapter
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 436)

Abstract

This paper presents the implementation of the modulation strategy to balance the neutral point potential (NPP) in three-level NPC inverters. This method employs the space vector pulse width modulation technique which gives the strong regulating ability of common-mode voltage of DC link capacitors. Apart from balancing the dc bus voltage this paper also examines the switching losses and junction temperature associated with the three-level inverters. The comparison of three-level inverter with two-level inverter, on the basis of switching losses, has also been explored. The performance of the modulation strategy to balance NPP has been validated and verified using MATLAB/Simulink.

Keywords

Three-level neutral point clamped (NPC) inverters Space vector modulation (SVM) Neutral point voltage balancing 

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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  • Subramaniam Umashankar
    • 1
    Email author
  • Vishnu Kalaiselvan Arun Shankar
    • 1
  • Padmanaban Sanjeevikumar
    • 2
  • K. Harini
    • 1
  1. 1.Department of Energy and Power ElectronicsVellore Institute of Technology (VIT) UniversityVelloreIndia
  2. 2.Department of Electrical and Electronics EngineeringUniversity of JohannesburgAuckland Park, JohannesburgSouth Africa

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