Design and Analysis of Ultra-Low Power QCA Parity Generator Circuit
Quantum-dot cellular automata (QCA) are a new paradigm in nanoscale technology with high frequency and low power consumption capabilities. This work presents a low complexity two-input XOR gate, which achieves low power consumption compared to prior ones using an efficient five-input majority gate. To show the novelty of this structure, different bits even parity generators are addressed. The result shows proposed parity generators are more superior over the existing designs. We show a 32-bit even parity generator, which requires 40% less cell count and saves 50% area occupation over the previous best design. QCA Designer-2.0.3 and QCA Pro have been considered to evaluate the accuracy of presented designs and to evaluate the power dissipation respectively.
KeywordsQCA Parity generator XOR gate Majority gate Power dissipation
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