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Level Skip VLSI Architecture for 2D-Discrete Wavelet Transform

  • G. Kiran MayeEmail author
  • T. Srinivasulu
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 8)

Abstract

A low power and efficient 2-D Discrete Wavelet Transform architecture is proposed. Previous DWT architectures utilized flipping structures or modified lifting based schemes. In this over-lapped strip based scanning is utilized to reduce the number of clock cycles for reading the input pixels. In addition that, second level prediction and updating equations are derived directly. It is observed that the number of adders and multipliers are reduced. The hardware utilization and power consumption is decreased in order to improve the performance of the discrete wavelet transform. The execution results expose that the suggested architecture is enhanced in area competence of 1% slices, 1% of DSP 48 s, multipliers and adders are also decreased.

Keywords

Discrete wavelet transform Word length Xilinx FPGA Area Power consumption 

References

  1. 1.
    J.-R. Ohm, M. van der Schaar, and J. W. Woods, “Interframe wavelet coding: Motion picture representation for universal scalability”, Signal Processing: Image Communication, Vol. 19, issue. 9, pp: 877–908, Oct. 2004.Google Scholar
  2. 2.
    A.S. Motra, P.K. Bora, and I. Chakrabarti, “An Efficient Hardware Implementation of DWT and IDWT”, in Proceedings of conference on convergent technologies for Asia-Pacific region (TENCON 2003), Vol. 1, pp: 95–99, Oct. 2003.Google Scholar
  3. 3.
    S. Masud, and J.V. McCanny, “Reusable Silicon IP Cores for Discrete Wavelet Transform Applications”, IEEE Transactions on Circuits and Systems-I, Vol. 51, issue. 6, pp: 1114–1124, Jun. 2004.Google Scholar
  4. 4.
    Wei Zhang, Zhe Jiang, Zhiyu Gao and Yanyan Liu, “An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform”, IEEE Transactions on Circuits and Systems II, Vol. 59, issue. 3, pp: 158–162, Feb. 2012.Google Scholar
  5. 5.
    G. Menegaz and J.-P. Thiran, “Lossy to lossless object-based coding of 3-D MRI data”, IEEE Transaction on Image Processing., Vol. 11, issue. 9, pp: 1053– 1061, Sep. 2002.Google Scholar
  6. 6.
    J. E. Fowler and J. T. Rucker, “3-D wavelet-based compression of hyperspectral imagery”, in Hyperspectral Data Exploitation: Theory and Applications, Chapter. 14, pp: 379–407, 2007.Google Scholar
  7. 7.
    L. R. C. Suzuki, J. R. Reid, T. J. Burns, G. B. Lamont, and S. K. Rogers, “Parallel computation of 3-D wavelets,” in Proceedings of Scalable High- Performance Computing Conference, pp: 454–461, May 1994.Google Scholar
  8. 8.
    E. Moyano, P. Gonzalez, L. Orozco-Barbosa, F. J. Quiles, P. J. Garcia, and A. Garrido, “3-D wavelet compression by message passing on a Myrinet cluster,” in Proceedings of canadian conference on electrical and computer engineering, Vol. 2, pp: 1005–1010, 2001.Google Scholar
  9. 9.
    Anirban Das, Anindya Hazra and Swapna Banerjee, “An Efficient Architecture for 3-D Discrete Wavelet Transform”, IEEE Transactions on circuits and systems for video technology, Vol. 20, issue. 2, Sep. 2009.Google Scholar
  10. 10.
    David Salomon, Data Compression: the Complete Reference, Springer-Verlag, New York, 2nd edition, 2000.Google Scholar
  11. 11.
    Charilos. C, A. Skodras, T. Ebrahimi, “The JPEG 2000 still image coding system: an overview”, IEEE Transactions on consumer electronics, Vol. 46, issue. 4, pp: 1103–1127, Nov.2000.Google Scholar
  12. 12.
    Bartholoma. R, Greiner. T, Kesel. F, Rosenstiel. W, “A systematic approach for synthesizing VLSI architectures of lifting-based filter banks and transforms”, IEEE Transactions on circuits and systems I, Vol. 55, issue. 7, pp: 1939–1952, Feb. 2008.Google Scholar
  13. 13.
    Ahmed Al-Sulaifanie, Arash Ahmadi and Mark Zwolinski, “Very large scale integration architecture for integer wavelet transform”, IET Computers & Digital Techniques, Vol. 4, issue. 6, pp: 471–483, Nov. 2010.Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2017

Authors and Affiliations

  1. 1.Department of ECEGuru Nanak Institutions Technical CampusIbrahimpatnamIndia
  2. 2.Kakatiya College of Engineering, KUWarangalIndia

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