Improved In-System Debugging of High Level Synthesis Generated FPGA Circuits

  • A. Murali
  • K. Hari Kishore
  • A. Trinadha
  • Saswat Tripathy
  • P. Dhanunjaya Rao
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 5)


The new approaches for in-system debug of High-Level Synthesis generated hardware have been proposed. With these approaches the source level events are observed in the final hardware by using Event Observability Ports (EOP). And also Event Observaility Buffers (EOB) is proposed for tracing events with the use of EOPs. In EOBs the data storage is done in cycle-by-cycle manner on the basis of EOB-by-EOB. This approach leads to the loss of different event timing relationships information stored in various trace buffers. These event relationships are recovered by the proposed two methods in this chapter. The observed results in this chapter will describe the effectiveness and feasibilities of EOB trace strategy.


Event observability ports (EOP) Event observability of buffers (EOB) Trace buffer Field programmable gate array Design verifications 


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Copyright information

© Springer Nature Singapore Pte Ltd. 2017

Authors and Affiliations

  • A. Murali
    • 1
    • 2
  • K. Hari Kishore
    • 1
  • A. Trinadha
    • 3
  • Saswat Tripathy
    • 2
  • P. Dhanunjaya Rao
    • 2
  1. 1.Department of ECE, KLEFK.L UniversityGunturIndia
  2. 2.Department of ECERaghu Engineering CollegeVisakhapatnamIndia
  3. 3.Department of ECEChinthalapudi Engineering CollegeGunturIndia

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