Improving Shared Cache Performance Using Variation of Bit Set Insertion Policy
To satisfy the need for ever increasing demand of processing speed, arises need of significant change in the processor design from single to multi-core. Multi-core architecture design allows the increase in computing power of chips without increasing their complexity. Traditional processors employ a dedicated cache, the introduction of multi-core platform considers the shared use of cache memory. To increase the hit ratio an effective cache replacement policy needs to be developed. In this paper, a new scheme for block substitution in cache is proposed namely: Bit Set Insertion in random manner. The research methodology used in this research is experimental. The performance of the proposed algorithm is computed on INTEL Core Duo processor. Hit Ratio is computed by keeping the access patterns of string constant and compared with previously known policy for thrashing pattern in shared cache in multi-core environment.
KeywordsShared cache Multi-core Replacement Thrashing
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