Improving Shared Cache Performance Using Variation of Bit Set Insertion Policy

Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 5)

Abstract

To satisfy the need for ever increasing demand of processing speed, arises need of significant change in the processor design from single to multi-core. Multi-core architecture design allows the increase in computing power of chips without increasing their complexity. Traditional processors employ a dedicated cache, the introduction of multi-core platform considers the shared use of cache memory. To increase the hit ratio an effective cache replacement policy needs to be developed. In this paper, a new scheme for block substitution in cache is proposed namely: Bit Set Insertion in random manner. The research methodology used in this research is experimental. The performance of the proposed algorithm is computed on INTEL Core Duo processor. Hit Ratio is computed by keeping the access patterns of string constant and compared with previously known policy for thrashing pattern in shared cache in multi-core environment.

Keywords

Shared cache Multi-core Replacement Thrashing 

References

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    Tian Tian, “Software Techniques for shared-cache Multi-core systems” https://software.intel.com/enus/articles/software-techniques-for-shared-cache-multi-core-systems, (2007).
  2. 2.
    Tian Tian, “Effective Use of the Shared Cache in Multi-core architectures” http://www.drdobbs.com/parallel/effective-use-of-the-shared-cache-in-mul/196902836, (2012).
  3. 3.
    Khushboo Patidar, Dr. Richa Gupta.: A Taxonomy of Cache Replacement Algorithms. International Journal of New Technologies in Science and Engineering, vol. 2, Issue 3, (2015).Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2017

Authors and Affiliations

  1. 1.Department of Computer Science and ApplicationsChaudhary Devi Lal UniversitySirsaIndia

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