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Performance Comparison Between InP-ON and SON MOSFET at Different Nanotechnology Nodes Using 2-D Numerical Device Simulation

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Proceedings of Fifth International Conference on Soft Computing for Problem Solving

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 437))

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Abstract

This research paper analyzes and compares the design and electrical behavior of Indium Phosphide-On-Nothing (InP-ON) MOSFET with Silicon-On-Nothing (SON) MOSFET by using Atlas Silvaco two dimensional (2-D) numerical device simulator. The output and transfer characteristics of InP-ON and SON MOSFET are determined at 60, 45 and 35 nm technology nodes while taking the same electrical properties and biasing conditions. Subsequently, the comparison is made between InP-ON and SON MOSFETs in terms of transconductance, leakage current, threshold voltage and drain induced barrier lowering (DIBL) at various technology nodes, i.e., 35, 45 and 60 nm. The advantage of using proposed InP-ON MOSFET is that it gives extremely lower threshold voltage and DIBL effect in comparison with SON MOSFET at same technology nodes. However, both InP-ON and SON MOSFETs works properly for less than 100 nm technology node very efficiently and suppresses short channel effects (SCE). It is difficult to achieve extremely low threshold voltage below 45 nm channel length in SON MOSFET. So, to achieve extremely lower threshold voltage, InP-ON structure is used instead of SON MOSFET. InP-ON MOSFET structure contains different layers that includes source, drain and gate in combination with Indium Phosphide channel layer that is placed above an air tunnel, hence becomes InP-ON. With the advancement in nanotechnology era, it becomes very necessary to have very compact size of semiconductor devices to operate and produce best results at different lower technology nodes. In future, both InP-ON and SON will provide smooth comfort zone to work at lower technology nodes.

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Correspondence to Shashank Sundriyal .

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Shashank Sundriyal, Ramola, V., Lakhera, P., Mittal, P., Brijesh Kumar (2016). Performance Comparison Between InP-ON and SON MOSFET at Different Nanotechnology Nodes Using 2-D Numerical Device Simulation. In: Pant, M., Deep, K., Bansal, J., Nagar, A., Das, K. (eds) Proceedings of Fifth International Conference on Soft Computing for Problem Solving. Advances in Intelligent Systems and Computing, vol 437. Springer, Singapore. https://doi.org/10.1007/978-981-10-0451-3_30

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  • DOI: https://doi.org/10.1007/978-981-10-0451-3_30

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  • Print ISBN: 978-981-10-0450-6

  • Online ISBN: 978-981-10-0451-3

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