Skip to main content

Isolation of Physical and Logical Views of Dark-Silicon Many-Core Systems for Reliability and Performance Co-Optimization

  • Conference paper
Embedded System Technology (ESTC 2015)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 572))

Included in the following conference series:

  • 602 Accesses

Abstract

A fraction of a many-core chip has to become powered off in order to maintain allowable power budget and safe temperature in the dark silicon era. Techniques have been developed to selectively activate cores in distributed physical locations to avoid temperature hotspot. It results in the unexpected increase of communication overhead due to longer average distance between active cores on Network-on-Chip (NoC). We propose a physical and logical isolated framework based on Folded Torus-like NoC for heterogeneous many-core systems to achieve the guaranteed temperature reliability and satisfied application performance requirement. Physically distributed cores are interconnected through folded torus-like NoC and organized in clusters to enable logically condensed intercommunications within it. Compared to traditional mesh-like systems, the proposed folded torus-like organization can achieve on average 39.44 % application performance improvement and decrease average 9.3\(^{\circ }\)C of the chip.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Bhople, S.S., Gaikwad, M.A.: Article: A comparative study of different topologies for network-on-chip architecture. IJCA Special Issue on Recent Trends in Engineering Technology RETRET, 27–29, March 2013

    Google Scholar 

  2. Chantem, T., Dick, R., Hu, X.: Temperature-aware scheduling and assignment for hard real-time applications on mpsocs. In: Proceedings of DATE, pp. 288–293, March 2008

    Google Scholar 

  3. Dick, R.P., Rhodes, D.L., Wolf, W.: Tgff: Task graphs for free. In: Proceedings of CODES+ISSS

    Google Scholar 

  4. Esmaeilzadeh, H., Blem, E., St. Amant, R., Sankaralingam, K., Burger, D.: Dark silicon and the end of multicore scaling. SIGARCH Comput. Archit. News 39(3), 365–376 (2011). http://doi.acm.org/10.1145/2024723.2000108

    Article  Google Scholar 

  5. Hardavellas, N., Ferdman, M., Falsafi, B., Ailamaki, A.: Toward dark silicon in servers. Micro IEEE 31(4), 6–15 (2011)

    Article  Google Scholar 

  6. Henkel, J., Bauer, L., Dutt, N., Gupta, P., Nassif, S.R., Shafique, M., Tahoori, M.B., Wehn, N.: Reliable on-chip systems in the nano-era: lessons learnt and future trends. In: Proceedings of DAC, pp. 99–99 (2013)

    Google Scholar 

  7. Huang, W., Ghosh, S., Velusamy, S., Sankaranarayanan, K., Skadron, K., Stan, M.: Hotspot: a compact thermal modeling methodology for early-stage vlsi design. IEEE Tran. VLSI 14(5), 501–513 (2006)

    Article  Google Scholar 

  8. Li, S., Ahn, J.H., Strong, R., Brockman, J., Tullsen, D., Jouppi, N.: Mcpat: An integrated power, area, and timing modeling framework for multicore and manycore architectures. In: Proceedings of MICRO, pp. 469–480, December 2009

    Google Scholar 

  9. Pagani, S., Khdr, H., Munawar, W., Chen, J.J., Shafique, M., Li, M., Henkel, J.: Tsp: Thermal safe power: Efficient power budgeting for many-core systems in dark silicon. In: Proceedings of CODES+ISSS, pp. 10:1–10:10. ACM, New York (2014). http://doi.acm.org/10.1145/2656075.2656103

  10. Shafique, M., Garg, S., Henkel, J., Marculescu, D.: The eda challenges in the dark silicon era: temperature, reliability, and variability perspectives. In: Proceedings of DAC, pp. 185:1–185:6. ACM, New York (2014). http://doi.acm.org/10.1145/2593069.2593229

  11. Shafique, M., Garg, S., Mitra, T., Parameswaran, S., Henkel, J.: Dark silicon as a challenge for hardware/software co-design: Invited special session paper. In: Proceedings of CODES+ISSS, pp. 13:1–13:10. ACM, New York (2014). http://doi.acm.org/10.1145/2656075.2661645

  12. Taylor, M.: Is dark silicon useful? harnessing the four horsemen of the coming dark silicon apocalypse. In: Proceedings of DAC, pp. 1131–1136, June 2012

    Google Scholar 

  13. Taylor, M., Kim, J., Miller, J., Wentzlaff, D., Ghodrat, F., Greenwald, B., Hoffman, H., Johnson, P., Lee, J.W., Lee, W., Ma, A., Saraf, A., Seneski, M., Shnidman, N., Strumpen, V., Frank, M., Amarasinghe, S., Agarwal, A.: The raw microprocessor: a computational fabric for software circuits and general-purpose programs. Micro IEEE 22(2), 25–35 (2002)

    Article  Google Scholar 

Download references

Acknowledgement

This work is partially supported by Natural Science Foundation Of China (NSFC) No.61402060, National 863 Program 2013AA013202 and 2015AA015304, and Chongqing High-Tech Research Program cstc2014yykfB40007, China.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Weichen Liu .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2015 Springer Science+Business Media Singapore

About this paper

Cite this paper

Yang, L., Liu, W., Jiang, W., Li, M., Wang, J. (2015). Isolation of Physical and Logical Views of Dark-Silicon Many-Core Systems for Reliability and Performance Co-Optimization. In: Zhang, X., Wu, Z., Sha, X. (eds) Embedded System Technology. ESTC 2015. Communications in Computer and Information Science, vol 572. Springer, Singapore. https://doi.org/10.1007/978-981-10-0421-6_10

Download citation

  • DOI: https://doi.org/10.1007/978-981-10-0421-6_10

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-0420-9

  • Online ISBN: 978-981-10-0421-6

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics