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A New Common Subexpression Elimination Algorithm for Constant Matrix Multiplications Over Binary Field

  • Ning Wu
  • Xiaoqiang Zhang
  • Yunfei Ye
  • Lidong Lan
Conference paper

Abstract

In this work, a new multi-term common subexpression elimination (CSE) algorithm is proposed. The new algorithm aims to reduce area-delay-production (ADP) in VLSI designs of constant matrix multiplication (CMM) over binary field. For promoting delays optimization, a gate-level delay computing method is used to compute the delays based on the transformed constant matrices. The new algorithm also takes a greedy algorithm to search the minimal ADP result. The worst case computational complexities of the delay computing method and the new CSE algorithm are analyzed, respectively. Experimental results have shown that the new CSE algorithm has more efficient in ADP reduction in VLSI designs of binary CMM.

Keywords

Area-delay-production Binary field Common subexpression elimination Constant matrix multiplication Critical path delay Delay computing method Greedy algorithm Multiple constants multiplication 

Notes

Acknowledgements

This work was supported by the National Natural Science Foundation of China under Grant 61376025, the Industry-academic Joint Technological Innovations Fund Project of Jiangsu under Grant BY2013003-11.

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Copyright information

© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  • Ning Wu
    • 1
  • Xiaoqiang Zhang
    • 1
  • Yunfei Ye
    • 1
  • Lidong Lan
    • 1
  1. 1.College of Electrical and Information EngineeringNanjing University of Aeronautics and AstronauticsNanjingChina

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