Power Distribution Network Modeling and Analysis for TSV and Interposer-Based 3D ICs in the Frequency Domain



In this chapter, we treat the power distribution networks (PDNs) in TSV and interposer-based 3D ICs. First, we introduce the composition of the PDNs and the conventional design methodology of the PDNs in the frequency domain. For the design of the PDNs, we propose the modeling method for the PDNs in TSV and interposer-based 3D ICs based on a segmentation method. By using the models of the PDNs, we estimate and analyze the PDN impedance in TSV and interposer-based 3D ICs in the frequency domain with respect to the variations in the main design issues for the PDNs such as the size of grid-type PDNs, the number of power/ground (P/G) TSVs, and the capacitance of the on-chip decoupling capacitors (on-chip decaps).


Power distribution network (PDN) Grid-type PDN Power/ground through silicon via (P/G TSV) TSV-based stacked grid-type PDN Segmentation method Conformal mapping method Phenomenological loss equivalence method (PEM) 


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© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  1. 1.Department of Electrical EngineeringKAISTDaejeonRepublic of Korea
  2. 2.System LSISamsung Electronics Co., Ltd.HwaseongRepublic of Korea

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