Electrical Modeling of a Through Silicon Via



3D IC is emerging as a powerful solution for the next-generation system packaging and integration technology to achieve low power consumption, high channel bandwidth and high density integration capability simultaneously. As for the vertical interconnect for a 3D IC, through-silicon via (TSV) is a key component which can provide a significant performance improvement with greatly reduced physical length of channels among vertically integrated chips. In this chapter, the scalable and analytic electrical model of a TSV is proposed and the high-frequency electrical behavior and signaling performance of a TSV is analyzed in frequency and time domains.


Differential signal TSV Equivalent circuit model Single-ended signal TSV Scalable model TSV channel 3D IC 


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Copyright information

© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  1. 1.Department of Electrical EngineeringKAISTDaejeonRepublic of Korea
  2. 2.Rambus INC.San JoseUSA
  3. 3.System LSISamsung Electronics Co., Ltd.HwaseongRepublic of Korea

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