Using DSP32C Floating Point Signal Processor as a Radar Video Processor to Build a Modification Kit for Conventional Analog Weather Radar

Summary

In the last seminar of the COST 73 we have introduced a project which aims to bridge the gap between the hydrological needs and the ability of manually observed radar data in Hungary. In that project a modification kit was planned to build for the MRL-5 conventional analog weather radar as the first step forward. This modification kit is operating now at the radar station Nyiregyhaza. Changing our concept described in that paper our modification kit is built now around the AT&T DSP32C floating point digital signal processor working as the Radar Video Processor. Our modification kit has an PC/AT with 33 MHZ INTEL 80386 and ultra-VGA graphics working as a host system. The DSP32C DSP with 25 MFLOPS computational power, with own memory system up to 16 Mbyte separate from PC/AT memory, with high speed parallel and serial interfaces is a very effective part of a digital subsystem of the weather radars without any extreme costs. The DSP32C allows to use all the algorithms needed for the correct processing in real-time with floating point values from the receiver LUT to the coordinate conversion. The next algorithms are implemented in our RVP/Radar Video Processor/: linear receiver LUT, moving averaging, range correction, dBZ counting, coordinate conversion for PPI and RHI scans. The DSP32C allowed to use 512 input samples from each transmitted pulses to build output arrays with 256 x 256 8 bit dBZ pixels processing 4 byte floating point values at each computational phase. The RVP hardware elements are: 8 bit A/D board 2x256 kbyte buffers fers, DSP32C processor board with different interfaces and fast 48 kbyte 20 nsec memory bank and one additinal memory board up to 1 Mbyte slow and 64 kbyte fast memory bank.