Abstract
This paper reviews general implementation and modeling aspects of digital simulations of descriptions that make use of hardware description languages (HDLs).
First, it brieftly introduces the components of a simulator supporting HDLs and discusses the elaboration of the simulator and the simulation cycle. Related aspects such as interpreted versus compiled simulations are also mentioned.
Then, the paper discusses modeling for systhesis versus modeling for simulation, and presents modeling concepts available in varius HDLs (VHDL, Verilog HDL, UDL/I).
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© 1993 Springer Science+Business Media Dordrecht
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Stanculescu, A. (1993). HDL-Driven Digital Simulation. In: Mermet, J.P. (eds) Fundamentals and Standards in Hardware Description Languages. NATO ASI Series, vol 249. Springer, Dordrecht. https://doi.org/10.1007/978-94-011-1914-6_8
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DOI: https://doi.org/10.1007/978-94-011-1914-6_8
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-010-4846-0
Online ISBN: 978-94-011-1914-6
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