Abstract
The broadband HDL DACAPO III is introduced by discussing language support for various levels of abstraction: Gate/Switch level, RT level, Algorithmic level, System level. A short comparison with the VHDL approach to model hardware by concurrently active sequential processes concludes this contribution.
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References
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© 1993 Springer Science+Business Media Dordrecht
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Rammig, F.J. (1993). The Hardware Description Language DACAPO III. In: Mermet, J.P. (eds) Fundamentals and Standards in Hardware Description Languages. NATO ASI Series, vol 249. Springer, Dordrecht. https://doi.org/10.1007/978-94-011-1914-6_13
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DOI: https://doi.org/10.1007/978-94-011-1914-6_13
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-010-4846-0
Online ISBN: 978-94-011-1914-6
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