Micro/370

Abstract

Micro/370 will be a 32-bit single-chip NMOS microprocessor. It directly implements 102 System/370 instructions and supports the execution of an additional 60 System/370 instructions by coprocessors. Separation of Control Space from 370 Space provides a means of emulating unimplemented instructions without consuming any of the user’s memory space. Its external bus is compatible with the Motorola MC68000 but supports unmultiplexed 32-bit addresses and 32-bit data. The execution unit, bus controller, control store, instruction decoders, and clock phase generators are all on the chip. Microcode and functional specification of the execution unit are the direct result of Tredennick’s Flowchart Method for hardware design. The Micro/370 execution unit contains two 32-bit data buses, a 32-bit adder, a 32-bit arithmetic and logic unit, a 64-bit shifter, and 2 sets of 16 32-bit general purpose registers. The bus controller performs external bus arbitration, synchronizes external reset and interrupt signals, and runs bus cycles to read or write data in 1-byte, 2-byte, or 4-byte formats selected dynamically by the slave devices. Microcode in a 64-Kbit control store controls the processor. Micro/370 runs nominally with a 20-MHz clock and a 100-ns processor cycle.