Esprit ’89 pp 126-137 | Cite as

Reconfiguration in a Microprocessor: Practical Results

  • R. Leveugle
  • M. Soueidan
  • G. Saucier
  • J. Trilhe
  • N. Wehn
  • M. Glesner
Conference paper


This paper investigates microprocessor design technique using redundancy in order to increase the yield by means of end-ofmanufacturing defect tolerance. A lot of effort was done to obtain a regular design allowing the introduction of standby elements at an adequate level. The HYETI microprocessor chip is being manufactured within the ESPRIT 824 project (task C) and this paper reports on the practical results on silicon. In the HYETI chip, the area of the redundant elements was limited to less than 25% and a good compromise between area overhead and yield enhancement was achieved.


Defect Tolerance Product Term Test Input Area Overhead Linear Feedback Shift Register 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© ECSC, EEC, EAEC, Brussels and Luxembourg 1989

Authors and Affiliations

  • R. Leveugle
    • 1
  • M. Soueidan
    • 1
  • G. Saucier
    • 1
  • J. Trilhe
    • 2
  • N. Wehn
    • 3
  • M. Glesner
    • 3
  1. 1.Institut National Polytechnique de Grenoble/CSIGrenoble CedexFrance
  2. 2.SGS-Thomson MicroelectronicsGrenobleFrance
  3. 3.Technische Hochschule DamstadtDarmstadtGermany

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