Abstract
The silicon On Insulator (SOI) techniques are now considered as very promising for rapid VLSI Electronics. Indeed SOI allows: (a) high density of elementary devices in I.C. (b) high tolerance to ionizing radiations (α particles for example) (c) a drastic reduction of parasitic capacitances (increase of I.C. speed and decrease of power dissipation) (d) absence of latch-up.
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Kamarinos, G., Ghibaudo, G., Tsamakis, D., Papatriantafillou, C., Rokofillou, E. (1989). Complete Experimental and Theoretical Analysis of Electrical Transport of S.O.S. Films: The Particularity of Heavily Doped Samples. In: Nissim, Y.I., Rosencher, E. (eds) Heterostructures on Silicon: One Step Further with Silicon. NATO ASI Series, vol 160. Springer, Dordrecht. https://doi.org/10.1007/978-94-009-0913-7_33
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DOI: https://doi.org/10.1007/978-94-009-0913-7_33
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