Embedded Molecular Beam Epitaxy for a Coplanar Gallium-Arsenide on Silicon Technology

Abstract

Heteroepitaxy of GaAs on Si has gained interest over the past years because of the promising combination of optoelectronic and high speed properties of GaAs with the well established high density silicon technology. Devices with performances comparable to those of their GaAs on GaAs counterparts are frequently reported (^1,2,3). Although the high density of threading dislocations together with the remaining stress in the device layers are limiting factors for the lifetime and reliability of the minority carrier devices, some successes in the monolithic integration of e.g. Si MOSFET’s and double heterostructures LED’s are achieved (⁴). A serious problem that has not been adressed properly is the strong non-planarity of the surface after growth and definition of the GaAs device islands. This leads to severe problems during the following processing steps. A coplanar surface is desirable from a process point of view. One way to achieve such a coplanar surface is to recess wells several microns deep into the Si substrate and refill them with the epitaxial layer, such that the GaAs surface levels with the Si surface after the GaAs growth. Since the III–V devices are to be fabricated in the windows the embedded layer quality has to be at least comparable with the large area GaAs on Si. The possible introduction of surface roughness and the loss of the intentional misorientation after recessing the Si can lead to dramatic degradation of the morphology and the introduction of antiphase domains. It has been anticipated that the exposure of different crystallographic orientations and the more severe geometrical constraints for the embedded GaAs film may disturb the single crystal quality of the GaAs at the well edges (⁵).