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Mapping IDCT of MPEG2 on Coarse-Grained Reconfigurable Array for Matching 1080p Video Decoding

  • Guoyong Li
  • Leibo Liu
  • Shouyi Yin
  • Changkui Mao
  • Shaojun Wei
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 260)

Abstract

Coarse-grained reconfigurable array (CGRA) can achieve flexible and highly efficiencies for computing-intensive application such as multimedia, baseband processing and etc. MPEG2 is a popular multimedia algorithm which suits for CGRA. IDCT takes around 29 % of total time for MEPG2 Decoding, which is one of main parts of MPEG2. IDCT belongs to computation-intensive which fits for CGRA. The paper explores the parallelism of IDCT algorithm, mapping it on coarse-grained reconfigurable array. The simulation result shows 693 clock cycles are needed to complete 8 × 8 IDCT on REMUS, the cycles needed is just 36 % of XPP, just 24.7 % of ARM. The method improves performance for MPEG2 decoding. The performance fulfils MPEG2 decoding for 1080p @30 fps streams when employs 200 MHz clock frequency.

Keywords

IDCT MPEG2 CGRA Mapping REMUS 

Notes

Acknowledgments

This work is supported in part by the China National High Technologies Research Program (No. 2012AA012701), the Tsinghua Information S&T National Lab Creative Team Project, the International S&T Cooperation Project of China grant (No. 2012DFA11170), the Tsinghua Indigenous Research Project (No. 20111080997), the Special Scientific Research Funds for Commonweal Section (No. 200903010), the Science and Technology Project of Jiangxi Province (No. 20112BBF60050) and the NNSF of China grant (No. 61274131).

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Copyright information

© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  • Guoyong Li
    • 1
    • 2
  • Leibo Liu
    • 1
    • 2
  • Shouyi Yin
    • 1
    • 2
  • Changkui Mao
    • 3
  • Shaojun Wei
    • 1
    • 2
  1. 1.Research Center for Mobile ComputingTsinghua UniversityBeijingChina
  2. 2.Institute of Microelectronics, Tsinghua UniversityBeijingChina
  3. 3.Institute of Microelectronics, Xi’an Jiaotong UniversityXi’anChina

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