Hardware Implementation of Microprogrammed Controller Based Digital FIR Filter

  • Syed Manzoor Qasim
  • Mohammed S. BenSaleh
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 247)


Digital finite-impulse response (FIR) filter is the fundamental processing element of many digital signal processing (DSP) systems, ranging from wireless communications to image and video processing. The microarchitecture of digital FIR filter consists of a datapath and a control unit. The datapath is the computational engine of FIR filter and mainly consists of adders, multipliers and delay elements. Several techniques have been proposed in the existing literature to implement digital FIR filters in hardware using field programmable gate array (FPGA). In this chapter, hardware implementation of a parallel digital FIR filter architecture using a novel microprogrammed controller is presented. The main advantage of the microprogrammed controller is its flexibility in modifying the microprogram stored in ROM based control memory. To demonstrate the proposed technique, a 4-tap parallel FIR filter is implemented using Virtex-5 FPGA. The proposed FIR filter is coded in VHDL using top-down hierarchical design methodology. Performance evaluation is done based on the implementation results obtained through FPGA synthesis tools. The designed 4-tap FIR filter utilizes minimal area leaving bulk of the FPGA resources to implement other parallel processors on the same device. The design can be easily modified to implement higher-order and high speed FIR filters which are commonly used in video and image processing applications.


Digital filter Finite-impulse response (FIR) filter FPGA Hardware Implementation Microprogrammed controller 



This work was supported in part by King Abdulaziz City for Science and Technology (KACST) under Project Ejaz (IRU No. 31/513). The authors would like to thank the reviewers for their valuable comments and suggestions to improve the quality of this chapter.


  1. 1.
    Parhi KK (1999) VLSI digital signal processing systems: design and implementation. Wiley, New YorkGoogle Scholar
  2. 2.
    Khan SA (2011) Digital design of signal processing systems: a practical approach. Wiley, West SussexCrossRefGoogle Scholar
  3. 3.
    Nekoei F, Kavian YS, Strobel O (2010) Some schemes of realization digital FIR filters on FPGA for communication applications. In: Proceedings of 20th international Crimean conference on microwave and telecommunication technology (CriMiCo), pp 616–619Google Scholar
  4. 4.
    Zhou Y, Shi P (2011) Distributed arithmetic for FIR filter implementation on FPGA. In: Proceedings of IEEE international conference on multimedia technology (ICMT), pp 294–297Google Scholar
  5. 5.
    Meyer-Baese U, Botella G, Romero DET, Kumm M (2012) Optimization of high speed pipelining in FPGA-based FIR filter design using genetic algorithm. In: Proceedings of SPIE 8401Google Scholar
  6. 6.
    Bomar BW (2002) Implementation of microprogrammed control in FPGAs. IEEE Trans Industr Electron 49(2):415–422CrossRefGoogle Scholar
  7. 7.
    Barkalov A, Titarenko L (2008) Logic synthesis for compositional micro-program control units. Springer, BerlinCrossRefGoogle Scholar
  8. 8.
    Wiśniewski R, Barkalov A, Titarenko L, Halang W (2011) Design of microprogrammed controllers to be implemented in FPGAs. Int J Appl Math Comput Sci 21(2):401–412MATHGoogle Scholar
  9. 9.
    BenSaleh MS, Qasim SM, Bahaidarah M, AlObaisi H, AlSharif T, AlZahrani M, AlOnazi H (2012) Field programmable gate array realization of microprogrammed controller based parallel digital FIR filter architecture. In: Lecture notes in engineering and computer Science: proceedings of the world congress on engineering and computer science, WCECS 2012, 24–26 October, 2012 San Francisco, USA, pp 828–831Google Scholar
  10. 10.
    Rafiquzzaman M (2005) Fundamentals of digital logic and microcomputer design. Wiley, New JerseyCrossRefGoogle Scholar
  11. 11.
    Barkalov AA, Titarenko LA, Efimenko KN (2011) Optimization of circuits of compositional microprogram control units implemented on FPGA. Cybern Syst Anal 47(1):166–174CrossRefGoogle Scholar
  12. 12.
    Wisniewski R, Wisniewska M, Wegrzyn M, Marranghello N (2011) Design of microprogrammed controllers with address converter implemented on programmable systems with embedded memories. In: Proceedings of 9th IEEE east-west design and test symposium (EWDTS), pp 123–126Google Scholar
  13. 13.
    Amos D, Lesea A, Richter R (2011) FPGA-based prototyping methodology manual: best practices in design-for-prototyping. Synopsys Press, CaliforniaGoogle Scholar
  14. 14.
    Mukherjee N, Rajski J, Tyszer J (2001) Testing schemes for FIR filter structures. IEEE Trans Comput 50(7):674–688MathSciNetCrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  1. 1.King Abdulaziz City for Science and Technology (KACST)National Center for Electronics, Communications and Photonics (ECP)RiyadhKingdom of Saudi Arabia

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