Basic Computations Using a Novel Scalable Pulse-Mode Modules
In this chapter the basic computational functions used in many algorithms are implemented in pulse mode. For this purpose, a novel circuit is proposed for pulse-based logarithmic computation using integrate-and-fire (IF) structures. The smallest unit in the module is a network of three IF units that implements a margin propagation (MP) function using integration and threshold operations inherited in the response of an IF neuron. The three units are connected together through excitatory and inhibitory inputs to impose constraints on the network firing-rate. The MP function is based on the log likelihood computation in which the multiplication of the inputs is translated into a simple addition. The advantage of using integrate-and-fire margin propagation (IFMP) is to implement a complex non-linear and dynamic programming functions of spike based (pulse based) computation in a modular and scalable way. In addition to scalability, the objective of the proposed module is to map algorithms into low power circuits as an attempt to implement signal processing applications on silicon. The chapter shows the mechanism of IFMP circuit, dynamic characteristics, the cascaded modularity, the verification of the algorithm in analog circuit using standard \(0.5 \upmu m\) CMOS technology and the basic functions computation.
KeywordsExcitatory Inhibitory Integrate and fire log-sum-exp Margin propagation Pulse mode computation.
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