ADC Design for Neural Acquisition Application
A high precision sigma delta analog to digital convertor (SDADC) for neural signal acquisition application is presented in this paper, which has been fabricated in AMI 0.5 um standard CMOS process. The ADC achieves 85 dB SNR in a second older with 256 oversampling rate (OSR) architecture. Behavior level modeling is adopted to shorten the design cycle and provide reference specifications for circuits design. In circuit design, class-AB output structure ensures the enough output range and slew rate of the system requirement. The whole system consumes 0.7 mA current and occupies 0.9*0.5 mm2 area.
KeywordsSDADC Neural acquisition Behavior modeling Matlab Integrator Comparator
Research is supported by the national science foundation for young scientists of China (Grant No. 61201040).
- 1.O’Driscoll S, Meng TH, Shenoy KV, Kemere CT (2006) Neurons to silicon: implantable prosthesis processor. In: Proceedings of international solid state circuits conference, pp 552–553Google Scholar
- 2.Pallas-Areny R, Webster J (1999) Analog signal processing. Wiley, New YorkGoogle Scholar
- 3.Wang X, Zhong S, Chen Y (2009) Sigma-delta modulator for low power with SC techniques. IET international radar conference, pp 122–125Google Scholar