Device Degradation Under High Gate and Drain Bias Stress in IGZO Transistors

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 235)


The device degradation in InGaZnO thin film transistor has been investigated experimentally under high gate and drain bias stress. The transfer curve was positively shifted and the threshold voltage was increased after high gate and drain bias stress. This may be attributed to the trapped electron charges resulted from the injection of channel hot electrons. The threshold voltage shift is more significant after high gate and drain bias stress than after high gate bias stress. The device degradation can be predicted by the monitoring of the gate current. The device degradation is the most significant under high gate drain bias stress and light illumination at elevated temperature.


InGaZnO thin film transistor Device degradation Channel hot electron Positive gate stress Electron trap charge Device reliability 


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Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  • Hyun Jun Jang
    • 1
  • Seung Min Lee
    • 1
  • Jong Tae Park
    • 1
  1. 1.Department of Electronics EngineeringUniversity of IncheonIncheonKorea

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