A Hardware Design for Binary Image Recognition

  • Saul Martinez-Diaz
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 229)


Recently, nonlinear composite correlation filters have been proposed for distortion-invariant pattern recognition. The filter design is based on logical operations and the correlation is computed with a nonlinear operation called morphological correlation. In this paper a new implementation in parallel hardware of these kinds of filters for image recognition is proposed. The architecture is designed for a Field Programmable Gate Array (FPGA) device. The proposed design performs the most time consuming task of the recognition procedure. In consequence, it reduces the time required for the nonlinear operations in the spatial domain. Simulation results are provided and discussed.


FPGA Morphological correlation Nonlinear filters  Parallelprocessing Pattern recognition Programmable devices 


  1. 1.
    VanderLugt AB (1964) Signal detection by complex filtering. IEEE Trans Inf Theory 10:139–145Google Scholar
  2. 2.
    Hester CF, Casasent D (1980) Multivariant technique for multiclass pattern recognition. Appl Opt 19:1758–1761Google Scholar
  3. 3.
    Casasent DCW (1986) Correlation synthetic discriminant functions. Appl Opt 25:2343–2350Google Scholar
  4. 4.
    Mahalanobis A, Vijaya-Kumar BVK, Casasent D (1987) Minimum average correlation energy filters. Appl Opt 31:1823–1833Google Scholar
  5. 5.
    González-Fraga JA, Kober V, Álvarez-Borrego J (2006) Adaptive synthetic discriminant function filters for pattern recognition. Opt Eng 45:057005-1–057005-10Google Scholar
  6. 6.
    Doh YH, Kim JC, Kim JW, Choi KH, Kim SJ, Alam MS (2004) Distortion-invariant pattern recognition based on a synthetic hit-miss transform. Opt Eng 43:1798–1803Google Scholar
  7. 7.
    Wang Q, Deng Y, Liu S (2006) Morphological fringe-adjusted joint transform correlation. Opt Eng 45:087002-1–087002-9Google Scholar
  8. 8.
    Garcia-Martinez P, Tejera M, Ferreira C, Lefebvre D, Arsenault HH (2002) Optical implementation of the weighted sliced orthogonal nonlinear generalized correlation for nonuniform illumination conditions. Appl Opt 41:6867–6874Google Scholar
  9. 9.
    Martínez-Díaz S, Kober V (2008) Nonlinear synthetic discriminant function filters for illumination-invariant pattern recognition. Opt Eng 47:067201-1–067201-9Google Scholar
  10. 10.
    Martínez-Díaz S, Kober V () Morphological correlation for robust image recognition. In: Proceedings of IEEE 2011 international conference on computational science and its applications, Santander, Spain, 20–23 June 2011, pp 263–266Google Scholar
  11. 11.
    Maragos P (1989) Morphological correlation and mean absolute error criteria. In: IEEE transactions on acoustics speech and signal processing, pp 1568–1571Google Scholar
  12. 12.
    Fitch JP, Coyle EJ, NC Gallagher Jr (1984) Median filtering by threshold decomposition. In: IEEE transactions on acoustics speech and signal processing, pp 1183–1188Google Scholar
  13. 13.
    Martinez-Diaz S (2012) Parallel architecture for binary images recognition. Lecture notes in engineering and computer science: proceedings of the world congress on engineering 2012, WCE 2012, London, UK, 4–6 July 2012, pp 856–859Google Scholar
  14. 14.
    Vardavoulia MI, Andreadis I, Tsalides P (2002) Hardware implementation of soft color image morphological operations. Opt Eng 41:1536–1545Google Scholar
  15. 15.
    Bouchoux S, Bourennane E (2005) Application based on dynamic reconfiguration of field programmable gate arrays: JPEG 2000 arithmetic decoder. Opt Eng 44:107001-1–107001-6Google Scholar
  16. 16.
    Grivas E, Kyriakis-Bitzaros ED, Halkias G, Katsafouros SG, Morthier G, Dumon P, Baets R (2008) Wavelength division multiplexing based optical backplane with arrayed waveguide grating passive router. Opt Eng 47:025401-1–025401-7Google Scholar
  17. 17.
    Rakvic RN, Ives RW, Lira J, Molina C (2011) Case for a field-programmable gate array multicore hybrid machine for an image-processing application. J Electron Imaging 20:013015-1–013015-9Google Scholar
  18. 18.
    Hauck S, Dehon A (2008) Reconfigurable computing. Elsevier, AmsterdamGoogle Scholar
  19. 19.
    Zeidman B (2002) Designing with FPGA’s and CPLD’s. Elsevier, AmsterdamGoogle Scholar

Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  1. 1.División de Estudios de Posgrado e InvestigaciónInstituto Tecnológico de La Paz.La PazMéxico

Personalised recommendations