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A Performance Prediction Model of Parallel DCT on Mobile Embedded Systems

  • Yeong-Kyu Lim
  • Cheong-Ghil Kim
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 215)

Abstract

The recent development on semiconductor process and design technologies enables multi-core processors to become a dominant market trend in mobile devices. The parallel programming enabled by multi-core CPU can provide a great opportunity to increase the processing performance. This paper explores a performance prediction model of parallel DCT on heterogeneous mobile systems by measuring power dissipation. For our simulation, we implemented the fast DCT algorithm on various computing environments and the simulation results show the feasibility of the proposed method to estimate the performance gain in terms of power consumption on heterogeneous embedded systems.

Keywords

JPEG DCT Mobile embedded systems Multi-core Parallel programming Power dissipation Heterogeneous computing 

Notes

Acknowledgments

This research is supported by Ministry of Culture, Sports and Tourism (MCST) and Korea Creative Content Agency (KOCCA) in the Culture Technology (CT) Research and Development Program 2012.

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Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  1. 1.MC DivisionLG ElectronicsSeoulKorea
  2. 2.Department of Computer ScienceNamseoul UniversityCheonanKorea

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