Evaluation of DRAM Power Consumption in Server Platforms

  • Hyeonsang Eom
  • Chanho Choi
  • Shin-gyu Kim
  • Heon Y. Yeom
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 214)

Abstract

Low power computing issues become bigger and bigger for cost saving and environment. In case of CPU, DVFS technique can save runtime energy consumption. Fortunately, DRAM is usable at various frequency levels and we might use it for low power computing. Through the experiment, we find strong relationship between memory usage pattern of benchmark and power consumption before modeling and scheduling.

Keywords

Power consumption DRAM Memory frequency Bandwidth 

Notes

Acknowledgments

This research was supported by Next-Generation Information Computing Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology. (No. 2012-0006424) The ICT at Seoul National University provided research facilities for this study.

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Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  • Hyeonsang Eom
    • 1
  • Chanho Choi
    • 1
  • Shin-gyu Kim
    • 1
  • Heon Y. Yeom
    • 1
  1. 1.School of Computer Science and EngineeringSeoul National UniversityGwanak, SeoulSouth Korea

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