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Minimizing Boolean Functions

  • Bohdan Borowik
  • Mykola Karpinskyy
  • Valery Lahno
  • Oleksandr Petrov
Chapter
Part of the Intelligent Systems, Control and Automation: Science and Engineering book series (ISCA, volume 63)

Abstract

This chapter describes the graphical and algebraic most widely used ways to minimize logic functions (in order to reduce the circuit’s complexity), like truth tables, Karnaugh Maps that are based on the rule of complementation and the Quine-Mccluskey method, which is functionally identical to Karnaugh mapping, but its tabular form makes it more efficient for use in computer algorithms. The chapter provides many examples of minimization and their hardware implementations.

References

  1. 10.
    J.P. Hayes, Introduction to Logic Design (Addison-Wesley, Reading, 1993)Google Scholar
  2. 12.
    J.F. Wakerly, Digital Design Principles and Practices (Prentice-Hall, Englewood Cliffs, 1990)Google Scholar
  3. 16.
    W.-K. Chen, Logic Design (CRC Press, Boca Raton, 2003)Google Scholar
  4. 17.
    E.D. Fabricus, Modern Digital Design and Switching Theory (CRC Press, Boca Raton, 1992)Google Scholar
  5. 18.
    F.D. Petruzella, Programmable Logic Controllers (McGraw-Hill, New York, 2005)Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  • Bohdan Borowik
    • 1
  • Mykola Karpinskyy
    • 2
  • Valery Lahno
    • 3
  • Oleksandr Petrov
    • 4
  1. 1.Department of Electrical EngineeringUniversity of Bielsko-BialaBielsko-BialaPoland
  2. 2.Computer Science DivisionUniversity of Bielsko-BialaBielsko-BialaPoland
  3. 3.Department of Computer Systems and NetworksEast-Ukrainian National UniversityLuhanskUkraine
  4. 4.Department of Applied Computer ScienceAGH University of Science and TechnologyKrakowPoland

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