Minimizing Boolean Functions
This chapter describes the graphical and algebraic most widely used ways to minimize logic functions (in order to reduce the circuit’s complexity), like truth tables, Karnaugh Maps that are based on the rule of complementation and the Quine-Mccluskey method, which is functionally identical to Karnaugh mapping, but its tabular form makes it more efficient for use in computer algorithms. The chapter provides many examples of minimization and their hardware implementations.
- 10.J.P. Hayes, Introduction to Logic Design (Addison-Wesley, Reading, 1993)Google Scholar
- 12.J.F. Wakerly, Digital Design Principles and Practices (Prentice-Hall, Englewood Cliffs, 1990)Google Scholar
- 16.W.-K. Chen, Logic Design (CRC Press, Boca Raton, 2003)Google Scholar
- 17.E.D. Fabricus, Modern Digital Design and Switching Theory (CRC Press, Boca Raton, 1992)Google Scholar
- 18.F.D. Petruzella, Programmable Logic Controllers (McGraw-Hill, New York, 2005)Google Scholar