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Power-Aware Topology Generation Based on Clustering for Application-Specific Network on Chip

  • Fen Ge
  • Ning Wu
Chapter
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 170)

Abstract

A clustering-based topology generation approach is proposed to construct Network on Chip (NoC) topologies for given applications. The approach consists of four phases and constructs irregular NoC topology with design constraints, according to the communication requirements of the given application and characteristics of the router architectures. Specially, a recursion based link construction algorithm embedded in the topology generation is proposed to construct links between routers. The evaluation performed on various multimedia benchmark applications confirms the efficiency of the proposed approach. Experimental results show that the approach saves 61.5 % of power consumption on average in comparison with using regular Mesh topology. Significant network resource improvement is also achieved. Moreover, the approach performs well for two multimedia applications compared to existing algorithms.

Keywords

3D Application-specific Cluster Network on chip Power consumption Topology generation 

Notes

Acknowledgments

This work was supported by the Natural Science Foundation of China under Grant 61076019 and 61106018, the Aeronautical Science Foundation of China under Grant 20115552031, the China Postdoctoral Science Foundation under Grant 20100481134, and the NUAA Scientific Research Foundation for talent introduction.

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Copyright information

© Springer Science+Business Media Dordrecht 2013

Authors and Affiliations

  1. 1.College of Electronic and Information EngineeringNanjing University of Aeronautics and AstronauticsNanjngP.R.China

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