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Protecting Circuits Against Hold Time Violations

Due to Process Variability
  • Gustavo Neuberger
  • Gilson Wirth
  • Ricardo Reis
Chapter

Abstract

In this chapter, we show how to protect digital circuits against hold time violations due to process variability. First, a motivation in this issue is drawn. Then different options of how to provide the protection are presented.

Keywords

Short Path Setup Time Critical Path Digital Circuit Race Condition 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

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Copyright information

© Springer Science+Business Media Dordrecht 2014

Authors and Affiliations

  • Gustavo Neuberger
    • 1
  • Gilson Wirth
    • 2
  • Ricardo Reis
    • 3
  1. 1.Instituto Federal de EducaçãoCiência e Tecnologia do Rio Grande do Sul(IFRS) CampusCanoas CanoasBrazil
  2. 2.Depto de Eng ElétricaUniversidade Federal do Rio Grande do Sul (UFRGS)Porto AlegreBrazil
  3. 3.Instituto de InformáticaUniversidade Federal do Rio Grande do Sul (UFRGS)Porto AlegreBrazil

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